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"n"i6"nR6 n"n!i6: n1n.a n0(*nm n g~ n gt n (6"n")."n"i"$n4j2H>SW n?( n?( n?/.a /.?. aT _P n"n1Q`T.a*=@g n>0.|W/.a X`(BW n?( n?( n?(&/.a^ .aN^NuNV n (6"n").b n (:"n")6c.a n (6"n"):e n (:S"n#@6 n> n (:"n").W n/(6 n/(:NP n (:"n")6"ni n0("n2) AfB@`p=@ n0(R@=@`( n (:"n")6"n"i"4nʑQRn n0( nn n"n!i6:.a=@fJng n>0.|W/.aX`>4fN n> n?(& n0(*W n?( n0(WRW n?a\ n (6"n")."n"i"$n4j2H> n?( n?( n?/.aj >?94fNT.aN^NuNV n (:"n")6"n2)Ho.a n (6"n2)HЁ"n#@: n.:/.a@X? n1_ n.:/.aX? n1_ n.:/.aX? n1_ .a n (:"n")6"n3@ n> n/(2 n/(6NPN^NuNV n (6"n"):d.a.aN^NuNV n=h n (6"n"):d.a n0("n2)$n4*BAl n0("n2)A=@` n=h n> n (6"n").W n (62.HЁ/ n/(6NP> n/(6 n/(2NP0."ni n0.HѨ6 n"n!i6: n0(R@=@`0."n"i"4nQRn n0( nn.aJ@g>/.aX`V>4fN.adBW n?( n?( n?(&/.a .a>?94fNTN^NuNVBn n0(&n n> n0((nn0 n0(&"n2)*An m n0(("n2),AnlB@` n0(&n o n0(&`0. =@ n0((no n0((`0.=@ n-h6 n-h: n0(2.$n4*(BH$nA=@ n0( nn n0( S@=@ n0(&n n (."n"i"4n2HЁ-@>/.a0X-@`0 nH>a*=@0.n 0.D@Hn lRJn o .d n  fJngx n (6f4 n (:d n"n!i:6 n!n:` n!n6`2 n (6c n"n!i6: n!n6` n!n:`@Jng& n (6d n!n:` n!n6` n!n6 n!n:-n n (6f n (:g.a n.6/.azX? n0 n.6/.aX? n1_ n.:/.aDX? n1_ n.:/.aX? n1_.a,./// N6 nJnfF n.6/.aX=@ n0(ng n1n>/.aX-@ n"n1i n (."n"i"4n2HЁ-@`/. nH?aT _hR .d n  f n.:/.aX? n1_ pN^NuNVJy$f3$BW?94fNTN^NuNV>/.aXN^NuNVBW/.a XN^NuNV.a>4fN n0(("n2),A=@ n0(n o n0(`0. =@ n0((2. $n4*B$nA=@> n?(& n0(*W n0(n l?<`Bg0.W n?(&a\ n0(n`0BW?. ?. n?(&/.a n0(nRn 0.nn n0( n n>?94fNT.aN^NuNVH nJho n0(`p"n3@ n*h. n0h SH"n"i"00H n(h. n0(H n=h* n0(("n2)$n A=@` n>(` H>ax@nn  genn  fd n0( "n2)AlR  fR`.S/.a*X*@ "n")."n"i"$n4j 2"nRi n0(n` n0(("n2),AR@=@*LeB n.6/.aBX? n0 n.6/.aX? n1_ n.:/.a X? n1_ n.:/.aRX? n1_ n.6/.aX? n1_ n.:/.anX? n1_ n"n1i n*h. n0h"n"i"00H n>/.aX(@`/.H?aT _he n0(("n2),AnmB@`pJL0N^NuNV./.Bg?.?.?.?.?.?.?.?.?. /a2BW/aX.a.arN^NuNV./. /U/U?. ?94fN\>?94fNT>?94fN"T./U//U/U?94fN nBh nBh 0.n"n3@ nBh n1n n1n n1n nBh nBh n1n& n1n(0.n"n3@*0.n"n3@, n!n . n!n 6 n!n : n!n$2 n0(@>N/ n!_" n h"BP.aN^NuNV.al n."NN^NuNV3 )~3 4By43434N09+N^NuNV3 )~3 4By43434N09+N^NuNV34By4By434NN^NuNV3e4By4By434NN^NuNV# )n3 43 4By434N#/)nN^NuNV3 /3 /3i434By434N n0+ n0+N^NuNV3 /3 /Bn nH|2n)~2RRnJ@f3434Sn3434NN^NuNV3{4By4By434NN^NuNV#)j#)r .мZ#)v3d4By43 4 n 34N n 04#)~)j#+)r#0)v#/)nN^NuNV# )n343 4By434N#/)nN^NuNV# )r3%4By4By434N#+)rN^NuNV# )r3#4By4By434N#+)r n 1y0N^NuNV# )r . м #)v3&4By4By434N#+)r#0)vN^NuNV-|)~ n H"n2R TJ@f#)v3t4By4 .)~HS@3434N#0)vN^NuNV34By4By434N n 0+ n0+ n00 n00 n1y0 n1y0 n1y0 n1y0 n00 n1y0 n1y0N^NuNV# )n3r434By434N#/)nN^NuNV# )n3 )~34343434N#/)nN^NuNV3 )~34By43434N09+N^NuNV3 )~34By43434N09+N^NuNV3 )~3z4By43434NN^NuNV3 )~34By43434N09+N^NuNV3 )~34By43434N09+N^NuNV3 /By/3434By434N090N^NuNV3 )~3 )3'4By43434N n0+ n0+N^NuNV3 )~34By43434N09+N^NuNV3 )~3j4By43434N09+N^NuNVBy/3 /3 434By434N n 00 n00 n00 n00N^Nu#4)f"<)fpsNBNuNVBBJlDRBJ lD RB0. -@0.2. An=@ .gDN^NuNVH?BCB..,. f#)z <`hlDRCJlDRCn8fzB`0l :HGH`xe`Jge`|fD#)z D`#)z JLN^NuNV33R0.|Hм^-@=|` nH2n3R2RRn nm.4JN>B@093zN^NuNV#3R/#1/ #3Z/$#3z/(#4/,#4/0#/4J> aF33z4pN^NuNV>a*pN^NuNV>NN^NuNV33Z3 3\>NN^NuNV33Z3 3\3 3^33`33b33d33f33h33j33l33n33p3 3r3"3t#$43(3v3*3x>N n,03| n003~ n403 n803 n<03 n@03B@093zN^NuNV#43 3Z>2NN^NuNV33Z3 3\3 3^33`33b33d33f33h33j>3NN^NuNV33Z# 4>4NN^NuNV#4>6N n 03| n03~ n03 n03B@093zN^NuNV#4# 4>ZN n03|B@093zN^NuNV>MN n03| n 03~ n03 n03B@093zN^NuNV33Z# 4>NNN^NuNV>ON n03| n 03~ n03 n03N^NuNV#43 3Z>NN^NuNV#43 3Z33\> NN^NuNV#43 3Z33\>!NN^NuNV#43 3Z33\33^33`33b33d>*NN^NuNV#43 3Z33\33^33`>+NN^NuNV#43 3Z>,N n03| n03~B@093zN^NuNV#4# 4>xNN^NuNV33Z3 3\3 3^33`33b>dNN^NuNV33Z3 3\3 3^33`33b>eNN^NuNV33Z3 3\>hN n 03| n03~ n03 n03B@093zN^NuNV33Z3 3\3 3^33`33b33d>iNN^NuNV33Z>kNN^NuNV33Z3 3\3 3^33`33b33d>lN n03| n03~ n03 n 03B@093zN^Nu EQUALSBETWEENCONTAINSCANCELOKFIND-------------------report #1 report #2 report #3 report #4 report #5 report #6 report #7 report #8 report #9 report #10 ? @V:,d  aAA! B #@?@@?@ A! 9ppp9 %9UpIpApA9b" bb0b b <<<p<p<x<x<xx<xp<<p<<<<<<<<p<<p<<x<<x<8x<xx<p<<<>>77773'3'χ3gp1G881Gp81ǀx8a08080ᇀ8?0q880q88>80sp880:`880:880>x00v< ~<@* UTUUTTT  @@T *PUP U@( T@T TPP *APPU@  @U  @P  *U@(* U( ( PT  *PPPUP  *@@@UU  @@AUUT( @AAU@ @PU@ @PU(@@T(@@P(@ @ *@T PP*UUP*U@*U PJZ@"x20s -v@    0  00  "`0  (@  0@ $ Y @ 8 D YZ[ \(]0 ^8094_{ (P1 $ #0)!"##%.xY&6'(H)S* +e(,w0-8.@$(H|tl077 7.7<7J7X p  p `@p`@`@Bf  ( 0 8 @ H >P  pd @2@A` S`(d@0u`8 @@ `H `P @X equals: from: contains: to:  (4 4!Z!%`l%`%`( ( ( 8` t `'$` >4 !T ! @L @ @  (  4  8 ` t 0' 0>([<(!(݀݀݀݀݀݀1`8b @b $0b D0b d `>4 , @ I@ @! d>4 8x$x ~ $ '~%  +%  . 0 2 g44F =F !F C XXXXXXXXXXXXXX| L ZN << D"<e2<l< l   B$ f. 8BLV` >j>4 >  ;(Pj 4l | 0 %@ d<  ,  LD/  .BV$t$t$t%4%4%4%4%4%4$$$$$(*(R(`*(z(*) %<%&"'( -$+,,,,,-PHKMPb1121 12 02$262H2Z32l332~3333r232333"333433F333X6T6h686^7,67<7n77888>888 HELP HELP HELP HELP Desk File Edit Report Record About One----------------------------------------------- Switch Files ... Save ^S Quit ^Q Cut ^X Copy ^C Paste ^V Clear Field Design New ... Edit ... Print ... ^P Add ^A Find All Find Some... ^F Next ^N Previous ^B Delete... ^DGetting StartedAdding RecordsFinding RecordsEditing RecordsDesigning ReportsSpecificationsHelp About ...MOREBACKCANCELAbout DB Master One...Programming byDaniel R. MatejkaStanley A. CraneScreen design byKwasi CasenDocumentation byEllen RonyJohn G. Dickersonversion 5339123123FORMFIELDSSORT COLUMN PAGE RECORDMAILING LISTPrint SubtotalsStart New PageYESNOYESNO12309, AZZA, 90ERASEChoose ReportSend it toDISK Name This ReportREPLACE OLDSAVE AS NEW[3][Save didn't work.|Try another disk;|this one may be|full or bad.][ OK ][2][This file has been|changed, but not saved.|Before going on ...][SAVE|QUIT|CANCEL] records, % fullFILLED Use One: Use One [3][This file is full.][ OK ][1][There are no records in the|file that match what you have|asked for.][ OK ]from STONEWARE 1985 DB Master, Inc[3][There are 10 reports already.|Delete one before you|make another.][ OK ]PRINTERSCREENSend to:DELETEEDITTo:[1][This is the last record|in the file that matches|what you have asked for.][ OK ][1][This is the first record|in the file that matches|what you have asked for.][ OK ][1][To delete a record, first get|the record on the screen, then|delete.][ OK ][2][Do you really want to|delete this record?][ YES | NO ][1][To edit data:|Get a record on the screen][ OK ][3][The field you have choosen|has no data area and|cannot be used.][ OK ][3][Does your mother know you|bang on computers like that?][ No | Yes ][1][Boris, save me!!|This guy can't type at all!!][ Not OK ][2][Hello Stanley.|Nice to see you.|Did you miss me?][ Nope | Yep ][1][This record is full. Remove|some characters from any field|before continuing.][ OK ][1][Click the mouse in the field|you wish to edit.][ OK ][1][No record is on the screen.][ OK ][2][You have made a lot of changes|to the file. Do you want to|save the file?][ YES | NO ]CANCELPR<R<R<R<R<R<R<QQPQaablblblbbbccc6c6gggghhhihhh}}~~ ~~}j}r}~X~~~~~~`~}j~Use One@:\*.ONEuseone.hlp[3][The help file is missing.|No help will be|available.][ OK ][3][There is not enough memory in|this computer to USE this file.][ OK ][3][This is not a DB Master ONE file.][ OK ][1][The screen must be in|lowmediumhigh resolution before|this file can be opened.][ OK ]useone.hlp[3][The disk containing the|help file has been removed.][ OK ]useone.hlp[3][The disk that contains|the help file has been|removed.][ OK ]Choose fieldChoose Equals, Between, or ContainsFill in the BlanksChoose 1,2,3 or FindChoose form of reports:Choose options-10000000001000000000ZZZZZZZZZZZ1-100 __________________ [1][The file is full. This report|cannot be saved.][ OK ][1][There is already a report|with a similar name.][ OK ][3][Are you sure you want to|delete this report?][ YES | NO ]When changes [1][That field will not fit|on your report.][ OK ]Total this Field XxxxxxxxxxxxxxxxxxxERASE________________________CANCEL[1][Before you can print or edit a|report, you must design a report.][ OK ][1][There are too many fields|for this to be a column|report.][ OK ]!!!!!!!!!!!!!Space pauses, Return quitsany key continues ...Report finished; hit any keyPress mouse button to continue[1][Printing Paused][CONTINUE][1][Printing Paused][CONTINUE][3][Can't write on disk.|The disk is probably full.|Cancelling report.][ OK ] - Subtotals for Grand Totals for records in of ''this report.JanFebMarAprMayJunJulAugSepOctNovDec Page [3][Please turn on the printer][ OK | CANCEL ]*.RPT.RPT[3][Can't open file.|Try another disk.][ OK | CANCEL ]A '*' in any field indicates an overflow. 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Getting Started...To add, just click where you wouldlike to type, and type.If you see any errors, just clickafter them, backspace and type thecorrect data.You may choose any menu option atany time.Shortcuts...The symbol ^ means control, anymenu option with such a symbol maybe chosen by pressing the letterwhile holding down the control key.To select a large area of text,click on one side, then hold downthe shift key and click on theother side.About the MENU BAR...These menu options are available:FILE - Switch files, Save the file, or QuitEDIT - Cut (remove), - Copy (duplicate) - Paste (restore) dataREPORT - Design & Print ReportsRECORD - Enter, review & Edit DataAbout the FILE MENU...# Records, % Full - the size of your fileSwitch Files - open a different DB Master One fileSave - store the file on the disk and continueQuit - leave DB Master & return to the desktopAbout the EDIT MENU...Cut - remove darkened text for later recall with Paste.Copy - store darkened text for later recall with Paste.Paste - return most recent Cut or Copied data to data box at the cursor.Clear - erase all of the data in the field.About the REPORT MENU...Design New - start a new report design. Choose report form, fields, records and the order in which records will be printed.Edit - change an existing report.Print - print a report to the screen, printer, or disk.About the RECORD MENU...Add - add the record that is on the screen to the file.Find All - display every record.Find Some - display certain recordsNext - display the next record.Previous - display previous record.Delete - remove the current record from the file.About ADDING RECORDS...To begin adding records, choose Addfrom the Record Menu.Fill in the form for the newrecord.Choose Add again to prepare anotherblank form.About FINDING & EDITING RECORDS...Records will be displayed on thescreen if they match theinformation you have asked for.You may ask for up to 3 conditionsto be satisfied before a record isshown.Three types of matches are:EQUALS - will find records that start with the match data you asked for. State equals Ca will find Ca, Calif, and California.BETWEEN - will find records where data falls within the range.CONTAINS - will find records that include the match data anywhere within the field.If you ask for records where Nameequals Fred, Name equals Dan, andState equals Ca, you will getrecords of anyone named Fred or Danthat live in California. -------------------------Name equals Joe, Name equals John,Name equals Kim, will find thosewith the names Joe, John, or Kim.CONTAINS...is especially useful if you have alarge field of names of songs,poems, or words of any kind. -------------------------If you had a record collection fileyou would use something like SongTitles CONTAINS Jingle Bells to geta list of records that had thatsong on it.About Next and Previous...'Next' will display the next recordin the file. If you began lookingat your records by choosing 'FindSome' instead of 'Find All', 'Next'will find the next matching record. -------------------------In the same way, 'Previous' willfind the preceding record.About Editing Records...To edit a record:1. Find the record.2. Click in the fields you would like to change.3. Make the changes.4. Go on with your work.How to DESIGN A REPORT...Under REPORT choose 'Design New..'.From the FORM FIELDS FIND SORT,choose: *the appearance of the report *the fields to appear in order *the records to appear *the order of those recordsAbout REPORT FORMS...COLUMN - prints data lined up in columns with one line per record.RECORD - prints records as they are displayed on the screen.PAGE - prints the field label & its data in paragraph form.MAILING LIST - prints only the Splat fields of the MAIL LIST file in a mailing label form.How to choose FIELDS...You may choose fields for COLUMN orPAGE reports. Just click in thefields that you want printed, inthe order that you would like themprinted. -------------------------Click a field a second time toremove it from the report.How to FIND records for your reportChoose the information that youwould like all of the records onreport to match in the same way youwould to 'Find Some' records. -------------------------You may choose Erase to remove anunwanted match value entirely.How to SORT DATA for reports...1. Click the first sort field.2. Choose whatever options apply: * 0-9, A-Z is low to high (an ascending sort) * Print Subtotals * Start New Page3. Click "2" for a second sort (a sort within the first sort.)4. If desired, click "3".Help about SORT...If you sort on State, and say YESto Subtotals, and YES to New Page--After all of the Alaska records areprinted, the subtotals for Alaskawill be printed, and the Alabamarecords will begin at the top ofthe next page.About Naming your report...After you have designed your reportyou will be asked for its name.This name will be used in thereport title.All of your report names must bedifferent. Help Choosing Reports...When you edit or print reports, youare given a list of all of thenames of the reports you havecreated. Choose the one you wouldlike, then choose:Edit/Delete - (when editing) to change or remove the report.Screen/Printer/Disk - (when printing) to direct the report.About EDIT a report...To edit a report, choose the reportand click EDIT. Then from theFORM FIELDS FIND SORT box,choose what you would like tochange and make the changes.The changed report may: Replace the Old Report, or be Saved as a New Report.About PRINT a report...Choose the report you would like toPRINT. Then choose the destinationof the report: SCREEN, PRINTER, orDISK.Any report that is in RECORD Formmay be sent to the PRINTER only,not to DISK or to the SCREEN.About Disk Reports...You will be asked to name the filethat the report will be written to.The format on the disk is exactlythe same on disk as it is to theprinter -- after each report line,a carriage return (hex 0D) and aline feed (hex 0A) is "printed."If you are new to computerizedfiling, whether for your home orbusiness, DB Master One wasdesigned especially for you.It is exceptionally Easy to learn,Easy to use, and Quick.Use it to store, find and print anyinformation you want.About DB Master One Capacities...MAX. FILE - available ram to 320kMAX. FIELD SIZE - 3,000 charactersMAX. RECORD SIZE - 3,000 charactersWAYS TO FIND RECORDS - equals, between, containsREPORT FORMS - column, page, screen, mailing listREPORT DESIGNS STORED - 10SORT LEVELS FOR REPORTS - 3To find out about: * Other Quality Software Products * Technical Support * Special OffersWrite to: Stoneware 1850 Union Street, #347 San Francisco, CA 94123-9927#!3CE i  q |  ggb ! About BASIC TERMS...A FILE is a collection of relatedinformation.The FORM is the screen layout ofthe information to be stored.A filled-in form is a RECORD.All records in a file have the sameform.More about BASIC TERMS...Each item of information in theform is called a FIELD.FIELDS have LABELS to identify thecontents and DATA BOXES to hold theinformation. If 'Name' were theLABEL then the DATA BOX, would bethe 'blank' you would later fillin with a particular name.About FIELD LABELS...A FIELD may be missing either itsLABEL or its DATA BOX.Fields have a black Move Box on theleft (for moving the field, or forduplicating the field) and a blackSize Box on the right.How to PLACE FIELDS...Place the pointer where you wantthe FIELD to start.Click the mouse.Type a LABEL to identify thefield's contents.About Changing an old Design...If you want to change a design thatyou have already created, chooseRedesign from the FILE menu.Make whatever changes you wouldlike to make. You may add fields,remove fields, move fields around,change style, lengthen or shortenthe Data Boxes.More about Redesign...When you Save your new design, allof the information and reports inyour original file will be changedto the new design for you.No data will be lost unless youshorten a field so that the datawill not fit, then the extra datawill be cut off.Finishing your form...When you have placed all of thefields on your form, choose Savefrom the FILE menu. You will thenbe asked to name your file.We suggest that you use .ONE as thelast part of your file name. Thiswill make using your file easier.About the KEYBOARD...There are several special keys that are used with this program:CONTROL- Used with another key for menu items in place of the mouse. Shown as ^ in the menu. Press CONTROL with the key to choose a menu item.BACKSPACE - Used to erase the previous character.About the MENU BAR...Menu options appear when you pointat each of the menu headings:DESK - perform ST desktop functionsFILE - Save the file, Redesign (change) a file, or QuitEDIT - change or remove fields or field labels SPLAT - shortcut formsOPTIONS - set label and data styleAbout the FILE menu...New - start a new file design Redesign - change the form of an already created file without losing data or reportsSave - store the current designQuit - exit the program and return to the desktopAbout the EDIT menu...Cut Text - remove and store darkened portion of label for later recall.Copy Text - store darkened portion of label for later recall with Paste Text.Paste Text - return most recent Cut or Copied text to field at cursor location.More about the EDIT menu... Cut Field - remove and store entire field for later recall. (equivalent to the Delete key)Copy Field - store entire field for later recall with Paste.Paste Field - return most recent Cut or Copied field in place of the current field.About SPLAT...SPLAT holds pieces of files thatmay be used as a part of your file.For example, if you want to have adate as a part of your file, justSPLAT Date into your design.Click where you want the splat formto start. Next, choose the splatyou would like to use.More about SPLAT...To print mailing labels, you mustsplat MAILING LIST.You may move, change, lengthen, ormodify the fields in the mailinglist, but YOU MAY NOT DELETE ANY OFTHE FIELDS.About the OPTIONS menu...Use Label Style and Data Style toset the color, size, and style ofthe field labels and data.When a style is chosen, that stylewill remain in effect until youchange it again, or click in afield that has a different style.How to SET LABEL and DATA STYLE...Click in the field to change.From the OPTIONS menu, click onLabel Style or Data Style.Click in the boxes to change color,size, and style of text. The word"Sample" changes with each choiceto show its effect.More about Style...If you click in a field, then thestyle used for the label and dataof that field will be used inmaking new fields. (Unless youchange it.)How to CHANGE DATA BOX SIZES...Place the pointer in the smallblack box at the right edge of thefield (SIZE BOX).Hold down left mouse button andstretch or shorten the Data Box tothe size you want. The numberstell you about how many characterswill fit in the Data Box.How to MOVE FIELDS...Place the pointer in the smallblack box on the left side of thefield (MOVE BOX).Hold down left mouse button anddrag field to its new location.Release the mouse button.How to COPY FIELDS...Hold the [Shift key] while youpress and hold the mouse button inthe Move Box of the field you wantto duplicate.Drag the field to where you want toplace the copy.(This can also be done from theEDIT menu with Cut & Paste Field.)If you are new to computerizedfiling, whether for your home orbusiness, DB Master One wasdesigned especially for you.It is exceptionally Easy to learn,Easy to use, and Quick.Use it to store, find and print anyinformation you want.About DB Master One Capacities...MAX. FILE - available ram to 320kMAX. FIELD SIZE - 3,000 charactersMAX. RECORD SIZE - 3,000 charactersWAYS TO FIND RECORDS - equals, between, containsREPORT FORMS - column, page, screen, mailing listREPORT DESIGNS STORED - 10SORT LEVELS FOR REPORTS - 3To find out about: Other Quality Software Products Technical Support Special OffersWrite to: Stoneware 1850 Union Street, #396 San Francisco, CA 94123-9927` L*O.|+L*m - ЭЭм// ??<JNA NL/<NA"/0<NBNu#'DNA/9'DNuNVBBJlDRBJ lD RB0. -@0.2. An=@ .gDN^NuNVH?BCB..,. f#'H <`hlDRCJlDRCn8fzB`0l :HGH`xe`Jge`|fD#'H D`#'H JLN^NuNV*N.f/h/j/lNp 3p=|=|` N2n1|Rn n m=|.p/<p/N

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If omitted, they willbe added automatically.All DEGAS output files must use theextension .PI1.(1) From COLR to DEGAS format(2) From DEGAS to COLR format(3) Exit programYour choice?Enter COLR mural input file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Reading file...File read complete!*** INVALID .MUR FILE! ****** I CAN'T FIND THAT FILE! ***Enter COLR palette input file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Reading file...File read complete!*** INVALID .PAL FILE! ****** I CAN'T FIND THAT FILE! ***Now enter DEGAS output file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Writing file...*** NOT ENOUGH ROOM ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** FILE ALREADY EXISTS! ***Replace existing file (Y/N)?File conversion complete!*** WRITE ERROR ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** INVALID FILE NAME! ****** CAN'T OPEN OUTPUT FILE! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ***Enter DEGAS input file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Reading file...File read complete!*** INVALID DEGAS FILE! ****** I CAN'T FIND THAT FILE! ***Enter COLR palette output file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Writing file...*** NOT ENOUGH ROOM ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** FILE ALREADY EXISTS! ***Replace existing file (Y/N)?Palette write complete!*** WRITE ERROR ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** INVALID FILE NAME! ****** CAN'T OPEN OUTPUT FILE! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ***Enter COLR mural output file name:(Press [RETURN] to abort)>*** BAD FILENAME, PLEASE TRY AGAIN ***Writing file...*** NOT ENOUGH ROOM ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** FILE ALREADY EXISTS! ***Replace existing file (Y/N)?Mural write complete!*** WRITE ERROR ON DISK! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ****** INVALID FILE NAME! ****** CAN'T OPEN OUTPUT FILE! ****** PLEASE INSERT ANOTHER ****** DISK AND TRY AGAIN. ***NoYes123.vf & >                                                                             ,&Z        . &    `\*O.|*m - ЭЭм// ??<JNA NJ/<NA"/0<NBNu/<?<HNA\#ba~Hyx?<&NN\aa\Nu yN0<>BXQNuByhByf(yb?<?<NMXJ@f4<f<Ffa$`ܶ<GfaVByfRyh09h|2fNuB@<02B@<0d@B@<0 @B@<0@3fNuB@<0:B@<0d@B@<0 @B@<0@SE<9f>9hOv dHy?<&NN\RGQRFQNu02 yNPHC0|Nu@  yN0<>"yb22QNuHy?<&NN\Hy?< NA\nHyn?< NA\B@9nAnB0?</?<NAXNuEnter filename for save -->Enter filename for load -->Hy?< NA\nHyn?< NA\B@9nAnB0?</?<=NA3`/9b/<?9`?<?NA ?9`?<>NAXNu .( (2B>0&" $H" . D t.. D tMUSHRM TOSIt MUSHRO S Mt (`Rt`H+-------------------------------------+ ! THE MUSHROOM ANALYZER ! ! by Silas Warner,MicroProse Software ! +-------------------------------------+ *O.| Z*m - ЭЭм// ?<?<JNAX*_XK O ZAaa |C ^"س fa 9 ^4Vxg"Aa\AEaRa< fBgNAA$a:9 a<:aBAu9 bdJfgaA9aBATa<0a<=a$BA b"0 aNAYa<0a<=a$BA "0 a R<f69 AaAgAapaA" gA&aVahA0gA2a-H3??(09?@eHy?HnN.X"n 2"n =Q0.N^,_ _XN/,HNVAJ-H09?(@d&Hy?*0. ?N+N+XBy?(`Hy?*0. ?N+XN^,_ _TNA90B1|A:p01|A?01|A?*01|A`#9By?(N%4J@kC E> 4p3QN5 Hy> ? p?$QN5 Hy> ? p?$QA> O"Op?"QBgN"3?"CE> 1p0QN5 Hy> ? p?$QN5 Hy> ? p?$QN5 Hy> ? p?$QA> O"Op?"Q?<N"3?"CE> 9p8QN5 Hy> ? p?$QN5 Hy> ? p?$QN5 Hy> ? p?$QA> O"Op?"Q?<N"3?"CHE> "p!QN5 Hy> ? p?$QA> O"Op?"QBgN"3?"09?"rAfCE= N3? 09? `jCE; pQ`jCrE; pQ`PCPE; pQ`6C.E; pQ`S@ @b@0;NHy; Hy= N@e`*Hy?Hy= ? pQN5 Hy> ? p?$QA> O"Op?"QBgN"3?"09?"`DCO$OpQHy< N @e`ZHy?*Hy< ? +p*QN5 Hy> ? p?$QN5 Hy> ? p?$QA> O"Op?"QBgN"3? 09? rAf`xHy?*Hy< ? .p-QN5 Hy> ? p?$QN5 Hy> ? p?$QA> O"Op?"QBgN"3? 09? rAf`jHy?*Hy< ? to continue... Stop Scrolling. ][1][ Ready to Print! | | Use Control-S/Q to |[ Ok | Abort ] Printer is Ready! ][1][ Ready to Print! | Make sure that the |PRN:Output File Name?[ Disk | LPR | Mon ][0][ Select Output Source | ]CON:A:\*.TXTD:\*.TXTC:\*.TXTB:\*.TXT[ Disk | Keys ][2][ | Select Input Source | ][ Get on with it! ]Tell Webby Vaxrat sent ya! | ]300/1200 Baud 24 hrs a day | [0][ Call the Webbed Sphere! | (513) 299-3665 | [ Sure ] Used with Permission | ]Parts c1986 OSS & CCD. | [0][ Modified for the ST | by The Vaxrat | by Kernighan & Plauger ][ OK ]Software Tools in Pascal | [0][ The Copy Procedure | | From the book | NuNV?./. ?<=NAN^ _ONNV?.?<>NAN^ _ON/,HNVN7^A&-H?<BgBg?<&?<NJ-@/.?<Bg?<?<BgBgBgBgN=@/.?.AO"Op?"QBgBgN"n E4p$Qp.r"Aop"@/.?<Bg?<?<?<"?<Bg?<N=@/.?.CO$O"p!QCO$O"p!QAO"Op?"Q?<BgNv/.?<prArA??<?<?<?<?<?<N=@/.?.C$O$OBgBgN/.?<prA??<?<?<?<?<?<N=@/.?.CO$OpQBgBgN/.NlBnp=@/.?.N=@0.@e/.?.Bg?<N 0.ngBnp=@`/.?.HnN@p.R@rAHnN(/BgNl=@0.J@j p=@`r?.NhN5 Hz?<!N52Hn?HnN6"nE2p"Q"n E2p"Qp.=@Bn0.@eR0.J@W0.rA0p\@WÄC0.rA0p:@WÄCBd p=@` 0.S@=@`p=@p.=@f0.nfn,0.R@=@"n 0.2.tA0Rn`"n 0.@0.N^,_ _PNNu/,HNVN7^Aj-H0.T@=@?.N-@/.?"n$i -J"nB"nB"nB"np3@"nBi"n3n "n3n0.rAW0.rAWÄCBdD"nX/ CNO$ON"nP/ C2O$ON"np3@=n0.N^,_ _ON/,HNVN7^A-Hp.r.Ag0p.r.Alp.R@rAp.@"n0.-I"n0)rAW"n0)rAWÄCBd"n$i -J"nX/ AO"Op?"QN"np.R@3@"nP/ AO"Op?"QN"n/ AO"Op?"QN"np.R@3@"n3n "n3n `N^,_ _O NNu/,HNVtN7^AV-H=n=n=n=n=n=n=n=n=n ?<3HnHnHnxHntN&N^,_ _ON/,HNVnN7^A@-H0. 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An error occured while trying to close the file. An error occured while trying to flush a buffer to a disk file. An error occured while trying to fill a buffer from a disk file. No error. Fundamental error. Drive not ready. Unknown command. CRC error. Bad request. Seek error. Unknown disk. Sector not found. No paper. Write error. Read error. General error. Write protected. Disk changed. Unknown device. Bad sector(s). Insert other disk. Invalid function number. File not found. Path not found. Too many files open. Access denied. Invalid handle. Insufficient memory. Invalid memory block address. Invalid drive specified. No more files. Range error. Internal error. Invalid program format. Restricted memory requested. LISTPRINTBOOKPAGECANCELLISTPRINTBOOKPAGECANCELLISTPRINTBOOKPAGECANCEL.   $                                           $4&4( ( ahkA/#4C#8/??<?NA Jk0akM3 9:f,y4Ma2ea yakv< yakf:/94/98??<?NA JkDg /94/??<@NA Jk$`0ak0avk,M`z?<`?<?<LNAAEa& yaANa yaA/?< NA\NuBg/?<=NAPJ@NuBg/?<NAXJ@Nu??<?B?<BNA 2/?<?B?<BNA Nu,M*NAB %g g g g" \g :g`%g4 fBg99#,M#TNu<NuFILE.LSTCopying -> E Fast Ram Disk Copy by Jens-Uwe Mager & Scott Adams   & H v6* * COPY.S * * WRITTEN NOV 85 BY jENS-uWE mAGER * * Pathnames added March 86 by Scott Adams. * See Ram.doc for usage. * * OFFSETS INTO BASE-PAGE PRGLEN EQU $C DATALEN EQU $14 BSSLEN EQU $1C CMDLIN EQU $80 * TRAPS BIOS EQU 13 XBIOS EQU 14 TOS EQU 1 * FUNCTIONS PRSTRF EQU 9 CREATF EQU $3C OPENF EQU $3D CLOSEF EQU $3E READF EQU $3F WRITEF EQU $40 LSEEKF EQU $42 TERMF EQU $4C TEXT START: LEA INITS,A0 BSR PRSTR LEA FNAME,A0 BSR OPEN BMI ERRXIT MOVE.W D0,D7 ;FILE HANDLE BSR FILELEN BMI ERRXIT LEA BUFFER,A0 MOVE.L A0,-(SP) ;BUFFER AD ADD.L D0,A0 MOVE.B #0,(A0)+ MOVE.L A0,LISTEND LEA -256(SP),A1 SUB.L A0,A1 MOVE.L A1,MAX MOVE.L D0,-(SP) ;LENGTH MOVE.W D7,-(SP) ;HANDLE MOVE.W #READF,-(SP) TRAP #TOS ADD.L #12,SP TST.L D0 BMI ERRXIT MOVE.W D7,D0 BSR CLOSE BMI ERRXIT LEA BUFFER,A6 ; MOVE.W (A6),DRIVE ; CONTAINS c: CMP.B #':",DRIVE+1 BNE ERRXIT ; MOVE.L LISTEND,A6 ; START AT END OF LIST LEA -1(A6),A6 MAINLP: BSR SKIP BCS EXIT BSR PROGRESS MOVE.L DESTST,A0 BSR CREAT BMI ERRXIT MOVE.W D0,D6 ;HANDLE FOR NEW FILE MOVE.L STRING,A0 ;SOURCE STRING BSR OPEN BMI ERRXIT MOVE.W D0,D5 ;HANDLE FOR OLD FILE COPYLP: MOVE.L LISTEND,-(SP) MOVE.L MAX,-(SP) MOVE.W D5,-(SP) MOVE.W #READF,-(SP) TRAP #TOS ADD.L #12,SP TST.L D0 BMI ERRXIT BEQ ISEOF MOVE.L LISTEND,-(SP) MOVE.L D0,-(SP) MOVE.W D6,-(SP) MOVE.W #WRITEF,-(SP) TRAP #TOS ADD.L #12,SP TST.L D0 BMI ERRXIT BRA COPYLP ISEOF: MOVE.W D6,D0 BSR CLOSE BMI ERRXIT MOVE.W D5,D0 BSR CLOSE BMI ERRXIT MOVE.L A5,A6 BRA MAINLP EXIT: MOVE.W #0,-(SP) BRA.S XIT ERRXIT: MOVE.W #1,-(SP) XIT: MOVE.W #TERMF,-(SP) TRAP #TOS PROGRESS: LEA MESS1,A0 BSR PRSTR MOVE.L STRING,A0 BSR PRSTR LEA MESS2,A0 BSR PRSTR MOVE.L DESTST,A0 BSR PRSTR LEA MESS3,A0 PRSTR: MOVE.L A0,-(SP) MOVE.W #PRSTRF,-(SP) TRAP #TOS ADDQ.L #6,SP RTS OPEN: CLR.W -(SP) ;READONLY MOVE.L A0,-(SP) MOVE.W #OPENF,-(SP) TRAP #TOS ADDQ.L #8,SP TST.W D0 RTS CREAT: CLR.W -(SP) ;STD FILE R/W MOVE.L A0,-(SP) MOVE.W #CREATF,-(SP) TRAP #TOS ADDQ.L #8,SP TST.W D0 RTS CLOSE: MOVE.W D0,-(SP) MOVE.W #CLOSEF,-(SP) TRAP #TOS ADDQ.L #4,SP TST.W D0 RTS FILELEN: MOVE.W D0,-(SP) MOVE.W #2,-(SP) MOVE.W D0,-(SP) CLR.L -(SP) MOVE.W #LSEEKF,-(SP) TRAP #TOS ADD.L #10,SP MOVE.W (SP)+,D1 MOVE.L D0,-(SP) MOVE.W #0,-(SP) MOVE.W D1,-(SP) CLR.L -(SP) MOVE.W #LSEEKF,-(SP) TRAP #TOS ADD.L #10,SP MOVE.L (SP)+,D0 RTS ; ; SKIP THE PATHNAMES. BUILD DESTINATION NAME BACKWARDS INTO BUFFER ; SKIP0: MOVE.L A5,A6 SKIP: MOVE.L A6,A5 ;WHERE WE LEFT OFF IN LIST LEA DESTEND,A0 ;WHERE TO PUT IT CLR.B -(A0) ;NULL TERMINATED STRING SKLP MOVE.B -(A5),D0 BEQ SKLP ;SKIP 0'S CMP.B #$20,D0 ;SKIP SPACES BEQ SKLP CMP.B #$A,D0 BEQ SKLP CMP.B #$D,D0 ;BEGIN OF NEXT LINE BEQ SKIPEND CMP.B #'\',D0 BEQ SKIPEND CMP.B #':",D0 BEQ SKIPEND MOVE.B D0,-(A0) ;PUT INTO DESTINATION NAME BRA SKLP ; SKIPCR MOVE.B -(A5),D0 CMP.L #BUFFER,A5 BEQ SKIPEOF ;AT INITIAL DRIVE SPEC! we done! SKIPEND CMP.B #$D,D0 ;FIND CR OF PREVIOUS LINE BNE SKIPCR CLR.B (A5) ;MAKE SOURCE STRING NULL TERMINATED ; CMP.L #DESTEND-1,A0 ;SEE IF WE GOT ANYTHING BEQ SKIP0 ;NO ; MOVE.B DRIVE+1,-(A0) ;PUT IN DRIVE SPEC MOVE.B DRIVE,-(A0) MOVE.L A0,DESTST MOVE.L A5,A6 ;SAVE WHERE WE WHERE MOVE.L A5,STRING ;save start of source string ADDQ.L #2,STRING ;SKIP CR,LF RTS ; SKIPEOF: OR #1,CCR RTS DATA LISTEND: DC.L 0 MAX: DC.L 0 FNAME: DC.B 'FILE.LST',0 MESS1: DC.B 'Copying ',0 MESS2: DC.B ' -> ',0 INITS: DC.B $1B,'E',13,10,'Fast Ram Disk Copy by Jens-Uwe Mager & Scott Adams',13,10 ;fall through mess3 MESS3: DC.B 13,10,0 BSS DESTST DS.L 1 STRING DS.L 1 DRIVE: DS.W 1 DESTNAME: DS.B 128 DESTEND: ; ; NOTE EVEN THOUGH BUFFER IS 1 BYTE THE PROGRAM WILL USE ALL ; MEMORY FROM BUFFER TO START OF STACK, OR ALL MEMORY AVAILABLE! ; BUFFER: DS 1 ; END .  t..  tZ80SIM1 S t xZ80SIM2 S t Z80SIM3 S t 0 +Z80SIM4 S t ;' * COM1.ASM * CATHEY JAN86 ASM 68K COM SIMULATOR 8080 Z80 CPM68K * 8080 simulator. Runs CP/M 2.2 programs on MC68K under CP/M68K. Optional * tracing and Morrow HDDMA DMA buffer translating. Simulation speed of a 1.4 * MHz Z80. Not full simulation: some flag handling not quite right. Runs DDT, * LU, MAC, Morrow's FORMATMW, et al.. This file contains startup routines, * simulator core, tracing code and CP/M 2.2 simulation; see also COM2-4.ASM * (in this same DL). By Jim Cathey. From DDJ #111 (January '86). 21671 bytes. ************************************************************************* * * * * * 8080 Simulator for MC68000 * * * * With CP/M 2.2 call support, optional tracing and * * Morrow HDDMA DMA buffer translating. * * * * * * Version 1.2 1/21/85 JEC * * Fixed Extent bug in OPEN logic. * * Sped up code, sample MAC from 2:13 to 1:40. * * Now runs at a 1.4 MHz equivalent based on MAC sample. * * * * Version 1.1 8/29/84 JEC * * Fixed BDOS call #6 bug. * * * * Version 1.0 05/25/84 by Jim Cathey * * * * This program has been written for speed wherever possible, * * as such tends to be large because of the separate subroutine * * for each and every opcode of the target processor. * * * * On an 8MHz 68000 (Compupro) system the simulation speed is * * a little better than a 1MHz Z-80 when running MAC. The time * * for a sample assembly was 2:13 for the simulation vs 0:35 * * on a 4MHz Z-80, both systems used identical hard disk systems. * * * * It is not a complete simulation, as some flag handling * * isn't quite right, but it is enough to run the programs * * I wrote it for (DDT, LU, MAC, and Morrow's FORMATMW). * * * ************************************************************************* text page ************************************************************************* * * * This file contains the startup routines, the simulator core, * * tracing code, and the CP/M 2.2 simulation. * * * ************************************************************************* xdef optabl,flags,mnops globl mloop,illegl,service * * Conditional assembly flags. * trace equ 0 ; Non-zero for trace routine inclusion. trcdsk equ 0 ; Non-zero for FCB trace routine inclusion. dmpdsk equ 0 ; Non-zero for register dump in FCB trace. * !! diskio is in file COM2.S !! *diskio equ 0 ; Non-zero for special HDDMA support. * * Register definitions for the simulation. * return equ @16,r ; JMP (return) is fast return to MLOOP. pseudopc equ @15,r ; 8080's PC is register A5. opptr equ @14,r ; Pointer to opcode dispatch table. pseudosp equ @13,r ; 8080's SP is register A3. flagptr equ @12,r ; Pointer to 8080's flag lookup table is A2. targbase equ @11,r ; Pointer to 8080's address space is A1. regs equ @11,r ; Base pointer to 8080's registers is A1. regcon0e equ 7,r ; Register based constant #$E (for speed). regcon01 equ 6,r ; Register based constant #$1. regcon0f equ 5,r ; Register based constant #$F. regconff equ 4,r ; Register based constant #$FF. regf equ 3,r ; 8080's Flags rega equ 2,r ; 8080's Accumulator * * Note, only leaves D0-D1/A0 for free use by entire * program without saving registers for temporary use. * bdos .opd 0,$4e42 ; BDOS 'macro'. bios .opd 0,$4e43 ; BIOS 'macro'. page ************************************************************************* * * * Initialization and Main Opcode dispatcher. * * * ************************************************************************* start lea.l target,targbase ; Start of target memory. ifne trace ; Optional trace code. bsr entrads ; Enter trace delimiting addresses * ; if the code is desired. endc bsr lodfdos ; Load up the fake FDOS in target mem. bsr lodregs ; Load the remaining simulation registers. bsr loadcom ; Load the .COM program, tst d0 ; quit if unsuccessful. bne optprnt rts optprnt equ * ifne trcdsk ; If FCB tracing, print header. lea.l fcbmsg,a0 bsr lpstr endc mloop: * ; Execute simulation ~~mloop: ifne trace ; Optional trace. tst traceflg bne dotrace cmpa.l tracesad,pseudopc bne notrace move.b #1,traceflg dotrace bsr dump cmpa.l traceead,pseudopc bne notrace move.b #0,traceflg notrace equ * endc moveq #0,d0 ; Execute appropriate simulation subroutine. move.b (pseudopc)+,d0 ; Grab next opcode. asl #2,d0 ; (D0 high word is still 0!) move.l 0(opptr,d0.w),a0 jmp (a0) ; To the subroutine. page ************************************************************************* * * * Illegal instructions and Dumping. * * * ************************************************************************* illegl move.l #illgmsg,d1 ; Illegal opcode, say what & where, move.w #9,d0 bdos lea.l -1(pseudopc),a0 move.b (a0),d1 suba.l targbase,a0 bsr pbyte move.l #ilgmsg2,d1 move.w #9,d0 bdos move.l a0,d1 bsr pword move.l #ilgmsg3,d1 move.w #9,d0 bdos move.l #dumpmsg,d1 move.w #9,d0 bdos bsr dump ; and spill guts. rts ; Quit simulation. page dump movem.l d0-d1/a0,-(sp) move.l #dmpmsg2,d1 ; Dump all registers, move.w #9,d0 ; used for illegals and tracing. bdos move.b rega,d1 bsr pbyte move.b regf,d1 bsr pbyte bsr pspace move.w regb(regs),d1 bsr pword bsr pspace move.w regd(regs),d1 bsr pword bsr pspace move.w regh(regs),d1 bsr pword bsr pspace move.l pseudosp,d1 sub.l targbase,d1 bsr pword bsr pspace move.l pseudosp,a0 swap d2 ; Save REGA move.w #3,d2 tosloop move.b 1(a0),d1 ror.w #8,d1 move.b 0(a0),d1 bsr pword bsr pspace addq.l #2,a0 dbra d2,tosloop swap d2 move.l pseudopc,d1 sub.l targbase,d1 bsr pword bsr pspace bsr pspace move.b (pseudopc),d1 bsr pbyte bsr pspace ; Now show mnemonic bsr pspace moveq #0,d0 move.b (pseudopc),d0 asl.w #2,d0 lea.l mnops,a0 move.l (a0,d0.l),d1 move.l d1,-(sp) inc.l d1 move #9,d0 bdos move.l (sp)+,a0 cmp.b #" ",(a0) beq nooprnd cmp.b #"C",(a0) bne notcons move.b 1(pseudopc),d1 bsr pbyte bra nooprnd notcons cmp.b #"A",(a0) bne nooprnd move.b 2(pseudopc),d1 bsr pbyte move.b 1(pseudopc),d1 bsr pbyte nooprnd bsr pspace ; In case of conout calls during trace, bsr pspace ; they will be visible at end of line. bsr pspace movem.l (sp)+,d0-d1/a0 rts page ************************************************************************* * * * Initialization subroutines. * * * ************************************************************************* lodfdos lea.l fdos,a6 ; Load up the fake FDOS. move.l targbase,pseudosp adda.l #$10000,pseudosp lea.l -256(pseudosp),a0 move.w #fdoslen,d0 lodloop move.b (a6)+,(a0)+ dbra d0,lodloop lea.l -256(pseudosp),a0 move.l a0,d0 sub.l targbase,d0 move.b #$c3,0(targbase) ; Build BIOS & BDOS jumps. move.b #$c3,5(targbase) move.b d0,6(targbase) rol.w #8,d0 move.b d0,7(targbase) rol.w #8,d0 add.w #3,d0 move.b d0,1(targbase) rol.w #8,d0 move.b d0,2(targbase) move.w #0,-(pseudosp) ; Set up a return stack to exit simulation. rts lodregs lea.l optabl,opptr ; Point base register to opcode dispatch table. lea.l mloop,return lea.l flags,flagptr move.l targbase,pseudopc adda.l #$100,pseudopc ; Start execution at 0100H in target space. moveq #$e,regcon0e ; Set up quick constants. moveq #$1,regcon01 moveq #$f,regcon0f move.l #$ff,regconff moveq #0,rega moveq #0,regf rts page entrads move.l #tracemsg,d1 ; Enter trace address if necessary. move.w #9,d0 bdos bsr atol ; Get trace start address. and.l #$ffff,d1 move.l d1,a0 adda.l targbase,a0 move.l a0,tracesad move.l #tracemg2,d1 move.w #9,d0 bdos bsr atol ; Get trace end address. and.l #$ffff,d1 move.l d1,a0 adda.l targbase,a0 move.l a0,traceead move.w #10,d1 ; CRLF to end line. move.w #2,d0 bdos move.w #13,d1 move.w #2,d0 bdos rts * * OPEN file to be loaded, and load it into target * space if successful. * loadcom link a6,#0 ; Mark stack frame. movem.l d2-d3/a2-a4,-(sp) move.l 12(a6),a0 ; Get the address of the base page. lea.l $5c(a0),a2 ; Get FCB address. move.b #'C',9(a2) ; mash filename to .COM move.b #'O',10(a2) move.b #'M',11(a2) move.l a2,d1 move.w #15,d0 bdos ; OPEN file. cmpi.w #255,d0 ; ERROR? beq openerr move.l pseudopc,d2 ; Start loading at $0100 in target. filelod move.l d2,d1 ; Set DMA address. move.w #26,d0 bdos move.l a2,d1 move.w #20,d0 ; Read file until EOF. bdos tst d0 bne basepg add.l #128,d2 bra filelod basepg lea.l $80(targbase),a2 ; Set up the target's base page. move.l a2,d1 ; Start with default DMA address. move.l a2,dmaaddr move.w #26,d0 bdos lea.l $38(a0),a2 lea.l $5c(targbase),a3 ; Copy host's 2nd FCB to target's 1st FCB. move.w #36,d0 fcbloop move.b (a2)+,(a3)+ dbra d0,fcbloop lea.l $80(a0),a2 lea.l $80(targbase),a4 lea.l $81(targbase),a3 clr d0 move.b d0,(a4) move.b (a2)+,d0 ; Grab command tail from host's buffer. tail1 cmp.b #$20,(a2)+ ; Hack off ?.COM filename. dbeq d0,tail1 bne loaded ; If there's any tail left, then tail2 cmp.b #$20,(a2)+ ; remove leading whitespace. dbne d0,tail2 beq loaded dec.l a2 subq #2,d0 tail3 move.b (a2)+,(a3)+ ; Move the rest of the tail. inc.b (a4) dbra d0,tail3 move.b #0,(a3) bra loaded openerr move.l #opnmsg,d1 ; Can't open file. move.w #9,d0 bdos clr d0 loaded movem.l (sp)+,d2-d3/a2-a4 unlk a6 ; Trantor. rts page ************************************************************************* * * * BIOS and BDOS service request handler. * * * ************************************************************************* service moveq #0,d0 ; Handle BIOS/BDOS service request move.b (pseudopc)+,d0 ; of form HLT DB opcode. bne biosfn ; BDOS or BIOS? bdosfn moveq #0,d1 move.b regc(regs),d0 ; Get BDOS function number. move.w regd(regs),d1 ; Get argument. cmp #31,d0 ; Can't do Disk Parm Hdr function beq badbdos cmp #27,d0 ; or ALLOC vector fn. bne okbdos badbdos move.l #ilgbdos,d1 move.w #9,d0 bdos bsr dump bra quitprg okbdos cmp #9,d0 ; Translate target address to real address. blt noconv cmp #14,d0 beq noconv cmp #32,d0 beq noconv cmp #37,d0 beq noconv add.l targbase,d1 noconv cmp #26,d0 ; Save last known DMA address bne notdma ; (in case of OPEN processing). move.l d1,dmaaddr notdma move.b #0,fcbflag ; Separate FCB type requests cmp #15,d0 ; from the rest of the swine. blt notfcb ; (Assume not, at first). cmp #24,d0 blt fcb cmp #30,d0 beq fcb cmp #33,d0 blt notfcb cmp #37,d0 blt fcb cmp #40,d0 beq fcb bra notfcb page fcb swap d2 move.w #35,d2 ; Move the FCB to host working buf, move.l d1,a0 move.l a1,-(sp) lea.l fcbstor,a1 fcb1 move.b (a0)+,(a1)+ dbra d2,fcb1 move.l (sp)+,a1 lea.l fcbstor,a0 ; and swap the random record bytes move.b 33(a0),d2 ; to make them match the 68000's. move.b 35(a0),33(a0) move.b d2,35(a0) swap d2 move.b #1,fcbflag ; Set flag for proper recovery. move.l d1,-(sp) ; (Gotta put the pig back in pen!) move.l a0,d1 ifne trcdsk ifne dmpdsk ; Optional^2 Register dump. bsr dump endc endc cmp.w #15,d0 ; OPEN has a problem in that CP/M-68K bne notopen ; can only open the base extent, unlike tst.b 12(a0) ; CP/M-80. So we have to check and do beq notopen ; an OPEN then SEEK (RREAD) if required. bsr openproc bra results notopen: ~~notopen: ifne trcdsk ; Optional FCB trace. move.l d2,-(sp) move.b #' ',d2 bsr fcbtrc1 move.l (sp)+,d2 endc notfcb cmp #6,d0 ; Not an FCB request. Is it bne notdcon ; a direct console I/O function? cmp.b #$ff,d1 ; Yes, make host's look like target's. bne notdcon move.w #$fe,d1 bdos tst d0 beq results move.w #6,d0 move.w #$FF,d1 notdcon bdos ; FINALLY! Do the translated function. results move.w d0,regh(regs) move.b d0,rega move.b regh(regs),regb(regs) tst.b fcbflag ; Do we need to restore a FCB? beq done ifne trcdsk bsr fcbtrc2 endc lea.l fcbstor,a0 ; Restore the FCB to target, in proper order. swap d2 move.b 33(a0),d2 move.b 35(a0),33(a0) move.b d2,35(a0) move.l (sp)+,a0 move.l a1,-(sp) lea.l fcbstor,a1 move.w #35,d2 fcb2 move.b (a1)+,(a0)+ dbra d2,fcb2 swap d2 move.l (sp)+,a1 done move.b rega,d0 and.w regconff,d0 move.b 0(flagptr,d0.w),regf rts openproc: ~~openproc: ifne trcdsk ; Optional FCB trace. swap d2 move.b #' ',d2 bsr fcbtrc1 swap d2 bsr fcbtrc2a endc move.b 33(a0),-(sp) ; Save away RR fields! move.b 34(a0),-(sp) move.b 35(a0),-(sp) movem.l d0-d2,-(sp) moveq #0,d2 move.b 12(a0),d2 ; Save desired extent. clr.b 12(a0) bsr fcbbdos ; Do BDOS (with opt. tracing). tst.b d0 bmi badopen ; No seek if not good OPEN. asl.l #7,d2 ; Make EXTENT # into record offset. moveq #0,d0 move.b 32(a0),d0 bclr #7,d0 add.l d2,d0 ; Add onto CR to make abs record #. move.w d0,34(a0) ; Put into FCB. swap d0 move.b d0,33(a0) move.l #junkbuf,d1 ; Set DMA addr elsewhere for Rand Seek. move.w #26,d0 bdos movem.l (sp)+,d0-d2 move.w #33,d0 ; Random READ (SEEK) desired extent. bsr fcbbdos ; Do BDOS (with opt. tracing). clr d0 ; (OPEN) must always be successful because * ; of the way CP/M-80 & CP/M-68K differ * ; on OPENing non-zero extents. movem.l d0-d1,-(sp) ; Restore the proper DMA address. move.w #26,d0 move.l dmaaddr,d1 bdos movem.l (sp)+,d0-d1 restore move.b (sp)+,35(a0) ; Restore RR fields. move.b (sp)+,34(a0) move.b (sp)+,33(a0) rts badopen movem.l (sp)+,d0-d2 bra restore fcbbdos: ~~fcbbdos: ifne trcdsk ; BDOS call with optional FCB trace. move.l d2,-(sp) move.b #'+',d2 bsr fcbtrc1 move.l (sp)+,d2 endc bdos ifne trcdsk bsr fcbtrc2 endc rts biosfn cmp #1,d0 ; Handle Bios calls. beq quitprg cmp #$f,d0 ; List Status is ok. beq gudbios cmp #7,d0 bge badbios ; Don't allow disk functions! gudbios clr.w d1 move.b regc(regs),d1 movem.l d2-d7/a0-a6,-(sp) bios movem.l (sp)+,d2-d7/a0-a6 move.b d0,rega rts badbios move.b d0,-(sp) ; Flag illegal BIOS call move.l #biosmsg,d1 ; and spill guts. move.w #9,d0 bdos move.b (sp)+,d1 bsr pbyte move.l #biosmg2,d1 move.w #9,d0 bdos bsr dump quitprg move.l (sp)+,d0 ; Trash return address and rts ; quit simulation. page ************************************************************************* * * * FCB Tracing support routines. * * * ************************************************************************* ifne trcdsk fcbtrc1 movem.l d0-d2/a0,-(sp) ; Dump to printer each FCB usage move.b #9,d1 ; in format FN #, Disk, Name (ASCII) bsr lpchar ; and the rest, all in hex but the move.w d0,d1 ; name field. Print the returned bsr lpbyte ; value after the FCB. move.b d2,d1 ; Char in D2 is printed after FN #. bsr lpchar bsr lpspace bsr lpspace move.b (a0)+,d1 bsr lpbyte bsr lpspace move.w #10,d2 fcbtr1 move.b (a0)+,d1 ; Print Name field... bsr lpchar dbra d2,fcbtr1 bsr lpspace move.w #3,d2 fcbtr2 move.b (a0)+,d1 ; Ex .. Rc bsr lpbyte bsr lpspace dbra d2,fcbtr2 bsr lpspace bsr lpspace lea.l 16(a0),a0 ; Skip d0..dn field. move.w #3,d2 fcbtr3 move.b (a0)+,d1 ; CR .. R2 bsr lpbyte bsr lpspace dbra d2,fcbtr3 bsr lpspace bsr lpspace move.l dmaaddr,d1 sub.l targbase,d1 bsr lpword bsr lpspace movem.l (sp)+,d0-d2/a0 rts page fcbtrc2 movem.l d0-d1,-(sp) ; Line termination of FCB trace. bsr lpspace bsr lpspace move.b d0,d1 bsr lpbyte fcbtr21 move.b #10,d1 bsr lpchar move.b #13,d1 bsr lpchar movem.l (sp)+,d0-d1 rts fcbtrc2a: movem.l d0-d1,-(sp) ; Line termination if no result bra fcbtr21 ; is to be presented. endc page ************************************************************************* * * * Misc. service routines. * * (Inelegant, but rarely used so they stand as is). * * * ************************************************************************* pbyte move.l #$20018,d0 ; 2 nybbles, 24 bit shift first. bra pdigits pword move.l #$40010,d0 ; 4 nybbles, 16 bit shift first. bra pdigits paddr move.l #$60008,d0 ; 6 nybbles, 8 bit shift first. bra pdigits plong move.l #$80000,d0 ; 8 nybbles, no shift first. pdigits rol.l d0,d1 ; Do shift. bra pdigent pdiglop swap d0 ; Save nybble count. rol.l #4,d1 ; Print variable in d1. bsr ntoa pdigent swap d0 ; Get nybble count. dbra d0,pdiglop rts ntoa movem.l d0-d1,-(sp) ; Nybble in d1 to ASCII, then output. and #$f,d1 cmp #$a,d1 blt ntoa2 add.b #'A'-'9'-1,d1 ntoa2 add.b #'0',d1 move.w #2,d0 bdos movem.l (sp)+,d0-d1 rts pspace move.w #32,d1 ; Print a space. move.w #2,d0 bdos rts page * * Line Printer versions of above * lpbyte move.l #$20018,d0 ; 2 nybbles, 24 bit shift first. bra lpdigts lpword move.l #$40010,d0 ; 4 nybbles, 16 bit shift first. bra lpdigts lpaddr move.l #$60008,d0 ; 6 nybbles, 8 bit shift first. bra lpdigts lplong move.l #$80000,d0 ; 8 nybbles, no shift first. lpdigts rol.l d0,d1 ; Do shift. bra lpdgent lpdiglp swap d0 ; Save nybble count. rol.l #4,d1 ; Print variable in d1. bsr lntoa lpdgent swap d0 ; Get nybble count. dbra d0,lpdiglp rts lntoa movem.l d0-d1,-(sp) ; Nybble in d1 to ASCII, then output. and #$f,d1 cmp #$a,d1 blt lntoa2 add.b #'A'-'9'-1,d1 lntoa2 add.b #'0',d1 lntoa3 move.w #5,d0 bdos movem.l (sp)+,d0-d1 rts lpchar movem.l d0-d1,-(sp) ; Print a character. bra lntoa3 lpspace movem.l d0-d1,-(sp) ; Print space. move.w #32,d1 bra lntoa3 page * * Remaining misc. service routines. * lpstr movem.l d0-d1,-(sp) ; Print a null-terminated string. lpstr1 move.b (a0)+,d1 beq lpstr2 bsr lpchar bra lpstr1 lpstr2 movem.l (sp)+,d0-d1 rts konin move.w #1,d0 ; Console input for 'atol'. bdos rts atol moveq #0,d1 ; ASCII to long, stops on invalid hex char. clr d2 ; Returns long in d1, terminator char in d0, atol1 bsr konin ; d2=1 if any chars entered before terminator. cmp.b #$40,d0 blo atol2 and #$5F,d0 ; Mask to upper case. atol2 cmpi.b #'0',d0 ; Check range (0..9,A..F). blo atolend cmpi.b #'F',d0 bhi atolend cmpi.b #'9',d0 bls atol3 cmpi.b #'A',d0 bhs atol3 bra atolend atol3 moveq #1,d2 ; Valid characters entered, flag it. sub.b #'0',d0 cmp.b #$9,d0 bls atol4 sub.b #'A'-'9'-1,d0 atol4 ext d0 ; To long. ext.l d0 asl.l #4,d1 ; Tack it onto D1. add.l d0,d1 bra atol1 atolend rts page data ************************************************************************* * * * Target processor's data registers. * * Fake FDOS. * * * ************************************************************************* even regop3 equ -9 ; Operand 1 for DAA storage. regb equ -8 ; Offsets from register base pointer for regc equ -7 ; 8080's pseudo-registers. regd equ -6 ; A & F are in Data Registers. rege equ -5 ; Pseudo-PC is kept in an Address Register. regh equ -4 regl equ -3 regop1 equ -2 ; Operand 1 for DAA storage. regop2 equ -1 ; " 2 " " " fcbstor ds.b 36 ; Host works FCB's out of here. fcbflag ds.b 1 ; Flag says we used the FCB buffer. even tracesad ds.l 1 ; Trace start address. traceead ds.l 1 ; Trace end address. traceflg ds.w 1 ; Tracing enabled flag. dmaaddr ds.l 1 ; DMA address storage. page fdos dc.b $76,0,$C9 ; Fake BDOS for target system. * ; BIOS Jump Table dc.b $C3,$33,$FF ; Wboot dc.b $C3,$36,$FF ; Const dc.b $C3,$39,$FF ; Conin dc.b $C3,$3C,$FF ; Conout dc.b $C3,$3F,$FF ; List dc.b $C3,$42,$FF ; Punch dc.b $C3,$45,$FF ; Reader dc.b $C3,$48,$FF ; Home dc.b $C3,$4B,$FF ; Seldsk dc.b $C3,$4E,$FF ; Settrk dc.b $C3,$51,$FF ; Setsec dc.b $C3,$54,$FF ; Setdma dc.b $C3,$57,$FF ; Read dc.b $C3,$5A,$FF ; Write dc.b $C3,$5D,$FF ; Listst dc.b $C3,$60,$FF ; Sectran dc.b $76,1,$C9 ; Fake BIOS for target system dc.b $76,2,$C9 ; Const dc.b $76,3,$C9 ; Conin dc.b $76,4,$C9 ; Conout dc.b $76,5,$C9 ; List dc.b $76,6,$C9 ; Punch dc.b $76,7,$C9 ; Reader dc.b $76,8,$C9 ; Home * dc.b $76,9,$C9 ; Seldsk * dc.b $76,10,$C9 ; Settrk * dc.b $76,11,$C9 ; Setsec * dc.b $76,12,$C9 ; Setdma * dc.b $76,13,$C9 ; Read * dc.b $76,14,$C9 ; Write * dc.b $76,15,$C9 ; Listst dc.b $76,16,$C9 ; Sectran * fdoslen equ *-fdos page ************************************************************************* * * * Messages. * * * ************************************************************************* illgmsg dc.b $d,$a,'Illegal instruction $' ilgmsg2 dc.b ' at $' ilgmsg3 dc.b '.$' dumpmsg dc.b $d,$a,'Register contents:$' dmpmsg2 dc.b $d,$a dc.b '-AF- -BC- -DE- -HL- -SP- -S0- -S1- -S2- -S3- -PC- -op-',$d,$a,'$' biosmsg dc.b $d,$a,'Illegal BIOS call $' biosmg2 dc.b '.$' tracemsg dc.b 13,10,'Start trace at >$' tracemg2 dc.b 13,10,'End trace at >$' opnmsg dc.b 'Cannot open .COM file.$' ilgbdos dc.b 'Unsupported BDOS call.$' fcbmsg dc.b 9,'Fn# Dr NAME EX S1 S2 RC CR R0 R1 R2 Addr Rslt',10,13 dc.b 9,'----------------------------------------------------------',10,13,0 page bss ************************************************************************* * * * Target processor's address space. * * * ************************************************************************* even registers ds.b 10 ; Actual storage for 8080's other registers. target ds.b $10000 ; 8080's universe. junkbuf ds.b $80 ; For BDOS' OPEN faking (RREAD buffer). .end * COM2.ASM * Keywords: CATHEY JAN86 ASM 68K COM SIMULATOR 8080 Z80 CPM68K * 8080 simulator. Runs CP/M 2.2 programs on the MC68K under CP/M68K. Optional * tracing and Morrow HDDMA DMA buffer translating. Simulation speed of a 1.4 * MHz Z80. Not full simulation: some flag handling not quite right. Runs DDT, * LU, MAC, Morrow's FORMATMW, et al.. This file contains the target processor * (8080) simulation routines; see also COM1/3/4.ASM (in this same DL). By Jim * Cathey. From DDJ #111 (January '86). 37854 bytes. ************************************************************************* * * * This file contains the target processor (8080) simulation * * routines. * * * ************************************************************************* ************************************************************************* * * * Opcode dispatch table. One longword entry per opcode of the * * target (8080) processor, including illegals. * * * ************************************************************************* globl optabl,flags,nop00 xdef mloop,illegl,service,preED,outspec diskio equ 0 ; Non-zero for special HDC/DMA support. return equ @16,r ; JMP (return) is fast return to MLOOP. pseudopc equ @15,r ; 8080's PC is register A5. opptr equ @14,r ; Pointer to opcode dispatch table. pseudosp equ @13,r ; 8080's SP is register A3. flagptr equ @12,r ; Pointer to 8080's flag lookup table is A2. targbase equ @11,r ; Pointer to 8080's address space is A1. regs equ @11,r ; Base pointer to 8080's registers is A1. regcon0e equ 7,r ; Register based constant #$E (for speed). regcon01 equ 6,r ; Register based constant #$1. regcon0f equ 5,r ; Register based constant #$F. regconff equ 4,r ; Register based constant #$FF. * ; Often used constants #0 & #8 are predominantly * ; used by instructions that have 'quick' modes * ; which encompass these values -- no register * ; needed (or available, either). regf equ 3,r ; 8080's Flags rega equ 2,r ; 8080's Accumulator regop3 equ -9 ; Operand 3 for DAA storage. regb equ -8 ; Offsets from register base pointer for regc equ -7 ; 8080's pseudo-registers. regd equ -6 ; A & F are in Data Registers. rege equ -5 ; Pseudo-PC is kept in an Address Register. regh equ -4 regl equ -3 regop1 equ -2 ; Operand 1 for DAA storage. regop2 equ -1 ; " 2 " " " data page even optabl dc.l nop00,lxib,staxb,inxb,inrb,dcrb,mvib,rlca dc.l nop08,dadb,ldaxb,dcxb,inrc,dcrc,mvic,rrca dc.l nop10,lxid,staxd,inxd,inrd,dcrd,mvid,ral dc.l nop18,dadd,ldaxd,dcxd,inre,dcre,mvie,rar dc.l nop20,lxih,shld,inxh,inrh,dcrh,mvih,daa dc.l nop28,dadh,lhld,dcxh,inrl,dcrl,mvil,cma dc.l nop30,lxis,sta,inxs,inrm,dcrm,mvim,stc dc.l nop38,dads,lda,dcxs,inra,dcra,mvia,cmc dc.l movebb,movebc,movebd,movebe,movebh,movebl,movebm,moveba dc.l movecb,movecc,movecd,movece,movech,movecl,movecm,moveca dc.l movedb,movedc,movedd,movede,movedh,movedl,movedm,moveda dc.l moveeb,moveec,moveed,moveee,moveeh,moveel,moveem,moveea dc.l movehb,movehc,movehd,movehe,movehh,movehl,movehm,moveha dc.l movelb,movelc,moveld,movele,movelh,movell,movelm,movela dc.l movemb,movemc,movemd,moveme,movemh,moveml,halt,movema dc.l moveab,moveac,movead,moveae,moveah,moveal,moveam,moveaa dc.l addb,addc,addd,adde,addh,addl,addm,addaa dc.l adcb,adcc,adcd,adce,adch,adcl,adcm,adca dc.l subb,subc,subd,sube,subh,subl,subm,subaa dc.l sbbb,sbbc,sbbd,sbbe,sbbh,sbbl,sbbm,sbba dc.l andb,andc,andd,ande,andh,andl,andm,anda dc.l xrab,xrac,xrad,xrae,xrah,xral,xram,xraa dc.l orab,orac,orad,orae,orah,oral,oram,oraa dc.l cmpb,cmpc,cmpd,cmpe,cmph,cmpl,cmpam,cmpaa dc.l rnz,popb,jnz,jmpa,cnz,pushb,adi,rst0 dc.l rz,ret,jz,nopCB,cz,call,aci,rst8 dc.l rnc,popd,jnc,out,cnc,pushd,sui,rst10 dc.l rc,nopD9,jc,in,cc,nopDD,sbi,rst18 dc.l rpo,poph,jpo,xthl,cpo,pushh,ani,rst20 dc.l rpe,pchl,jpe,xchg,cpe,preED,xri,rst28 dc.l rp,popp,jp,di,cp,pushp,oria,rst30 dc.l rm,sphl,jm,ei,cm,nopFD,cpi,rst38 page ************************************************************************* * * * Flag register lookup tables. * * * ************************************************************************* flags dc.b $00,$01,$04,$05,$40,$41,$44,$45,$80,$81,$84,$85,$C0,$C1,$C4,$C5 dc.b $44,$00,$00,$04,$00,$04,$04,$00,$00,$04,$04,$00,$04,$00,$00,$04 dc.b $00,$04,$04,$00,$04,$00,$00,$04,$04,$00,$00,$04,$00,$04,$04,$00 dc.b $00,$04,$04,$00,$04,$00,$00,$04,$04,$00,$00,$04,$00,$04,$04,$00 dc.b $04,$00,$00,$04,$00,$04,$04,$00,$00,$04,$04,$00,$04,$00,$00,$04 dc.b $00,$04,$04,$00,$04,$00,$00,$04,$04,$00,$00,$04,$00,$04,$04,$00 dc.b $04,$00,$00,$04,$00,$04,$04,$00,$00,$04,$04,$00,$04,$00,$00,$04 dc.b $04,$00,$00,$04,$00,$04,$04,$00,$00,$04,$04,$00,$04,$00,$00,$04 dc.b $00,$04,$04,$00,$04,$00,$00,$04,$04,$00,$00,$04,$00,$04,$04,$00 dc.b $80,$84,$84,$80,$84,$80,$80,$84,$84,$80,$80,$84,$80,$84,$84,$80 dc.b $84,$80,$80,$84,$80,$84,$84,$80,$80,$84,$84,$80,$84,$80,$80,$84 dc.b $84,$80,$80,$84,$80,$84,$84,$80,$80,$84,$84,$80,$84,$80,$80,$84 dc.b $80,$84,$84,$80,$84,$80,$80,$84,$84,$80,$80,$84,$80,$84,$84,$80 dc.b $84,$80,$80,$84,$80,$84,$84,$80,$80,$84,$84,$80,$84,$80,$80,$84 dc.b $80,$84,$84,$80,$84,$80,$80,$84,$84,$80,$80,$84,$80,$84,$84,$80 dc.b $80,$84,$84,$80,$84,$80,$80,$84,$84,$80,$80,$84,$80,$84,$84,$80 dc.b $84,$80,$80,$84,$80,$84,$84,$80,$80,$84,$84,$80,$84,$80,$80,$84 page ************************************************************************* * * * Opcode simulation subroutines. * * * * Note: I/O instructions are based at 68000 address $FF0000 * * as is appropriate for the CompuPro CPU-68K card. * * * * Also, all routines assume that the high word of D0 = 0! * * * ************************************************************************* text even nop00 jmp (return) ; 00 Nop lxib move.b (pseudopc)+,regc(regs) ; 01 Lxi BC,nnnn move.b (pseudopc)+,regb(regs) jmp (return) staxb move.w regb(regs),d0 ; 02 Stax B move.b rega,0(targbase,d0.l) jmp (return) inxb inc.w regb(regs) ; 03 Inx B jmp (return) inrb inc.b regb(regs) ; 04 Inr B move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrb dec.b regb(regs) ; 05 Dcr B move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvib move.b (pseudopc)+,regb(regs) ; 06 Mvi b,nn jmp (return) rlca rol.b #1,rega ; 07 Rlc docyf bcs rlc1 bclr #0,regf jmp (return) rlc1 bset #0,regf jmp (return) nop08 bra illegl ; 08 Illegal for 8080 dadb move.w regb(regs),d0 ; 09 Dad B add.w d0,regh(regs) bra docyf ldaxb move.w regb(regs),d0 ; 0A Ldax B move.b 0(targbase,d0.l),rega jmp (return) dcxb dec.w regb(regs) ; 0B Dcx B jmp (return) inrc inc.b regc(regs) ; 0C Inr C move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrc dec.b regc(regs) ; 0D Dcr C move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvic move.b (pseudopc)+,regc(regs) ; 0E Mvi C jmp (return) rrca ror.b #1,rega ; 0F Rrc bra docyf nop10 bra illegl ; 10 Illegal for 8080 lxid move.b (pseudopc)+,rege(regs) ; 11 Lxi DE,nnnn move.b (pseudopc)+,regd(regs) jmp (return) staxd move.w regd(regs),d0 ; 12 Stax D move.b rega,0(targbase,d0.l) jmp (return) inxd inc.w regd(regs) ; 13 Inx D jmp (return) inrd inc.b regd(regs) ; 14 Inr D move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrd dec.b regd(regs) ; 15 Dcr D move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvid move.b (pseudopc)+,regd(regs) ; 16 Mvi D,nn jmp (return) ral roxr.b #1,regf ; 17 Ral roxl.b #1,rega roxl.b #1,regf jmp (return) nop18 bra illegl ; 18 Illegal for 8080 dadd move.w regd(regs),d0 ; 19 Dad D add.w d0,regh(regs) bra docyf ldaxd move.w regd(regs),d0 ; 1A Ldax D move.b 0(targbase,d0.l),rega jmp (return) dcxd dec.w regd(regs) ; 1B Dcx D jmp (return) inre inc.b rege(regs) ; 1C Inr E move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcre dec.b rege(regs) ; 1D Dcr E move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvie move.b (pseudopc)+,rege(regs) ; 1E Mvi E,nn jmp (return) rar roxr.b #1,regf ; 1F Rar roxr.b #1,rega roxl.b #1,regf jmp (return) nop20 bra illegl ; 20 Illegal for 8080 lxih move.b (pseudopc)+,regl(regs) ; 21 Lxi H,nnnn move.b (pseudopc)+,regh(regs) jmp (return) shld move.b 1(pseudopc),d0 ; 22 Shld addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.l d0,a0 adda.l targbase,a0 move.b regl(regs),(a0)+ move.b regh(regs),(a0) jmp (return) inxh inc.w regh(regs) ; 23 Inx H jmp (return) inrh inc.b regh(regs) ; 24 Inr H move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrh dec.b regh(regs) ; 25 Dcr H move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvih move.b (pseudopc)+,regh(regs) ; 26 Mvi H,nn jmp (return) daa move.b regop3(regs),d0 ; 27 Daa roxr.b d0 move.b regop2(regs),d0 move.b regop1(regs),d1 swap regcon0e move.b rega,regcon0e and.b regcon0f,regcon0e cmp.b #9,regcon0e bhi halfcy and.b regcon0f,d0 and.b regcon0f,d1 ori.b #$f0,d1 addx.b d0,d1 bcc nohalf halfcy add.b #6,rega bcs fullcy nohalf btst #0,regf bnz fullcy move.b rega,regcon0e and.b #$f0,regcon0e cmp.b #$90,regcon0e bls nofull fullcy add.b #$60,rega ori #1,ccr enddaa move sr,regf swap regcon0e and.w regcon0f,regf move.b 0(flagptr,regf.w),regf jmp (return) nofull tst.b rega bra enddaa nop28 bra illegl ; 28 Illegal for 8080 dadh move.w regh(regs),d0 ; 29 Dad H add.w d0,regh(regs) bra docyf lhld move.b 1(pseudopc),d0 ; 2A Lhld addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.l d0,a0 adda.l targbase,a0 move.b (a0)+,regl(regs) move.b (a0),regh(regs) jmp (return) dcxh dec.w regh(regs) ; 2B Dcx H jmp (return) inrl inc.b regl(regs) ; 2C Inr L move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrl dec.b regl(regs) ; 2D Dcr L move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvil move.b (pseudopc)+,regl(regs) ; 2E Mvi L,nn jmp (return) cma not.b rega ; 2F Cma jmp (return) nop30 bra illegl ; 30 Illegal for 8080 lxis move.b 1(pseudopc),d0 ; 31 Lxi S,nnnn rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.l d0,pseudosp adda.l targbase,pseudosp jmp (return) sta move.b 1(pseudopc),d0 ; 32 Sta addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.b rega,0(targbase,d0.l) jmp (return) inxs addq.l #1,pseudosp ; 33 Inx S jmp (return) inrm move.w regh(regs),d0 ; 34 Inr M inc.b 0(targbase,d0.l) move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcrm move.w regh(regs),d0 ; 35 Dcr M dec.b 0(targbase,d0.l) move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvim move.w regh(regs),d0 ; 36 Mvi M,nn move.b (pseudopc)+,0(targbase,d0.l) jmp (return) stc bset #0,regf ; 37 Stc jmp (return) nop38 bra illegl ; 38 Illegal for 8080 dads move.l pseudosp,d0 ; 39 Dad S sub.l targbase,d0 add.w d0,regh(regs) bra docyf lda move.b 1(pseudopc),d0 ; 3A Lda addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.b 0(targbase,d0.l),rega jmp (return) dcxs subq.l #1,pseudosp ; 3B Dcx S jmp (return) inra move.b rega,regop1(regs) ; 3C Inr A move.b regcon01,regop2(regs) move.b regcon0e,regop3(regs) inc.b rega move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) dcra dec.b rega ; 3D Dcr A move sr,d0 and.w regcon0e,d0 and.w regcon01,regf or.b 0(flagptr,d0.w),regf jmp (return) mvia move.b (pseudopc)+,rega ; 3E Mvi A,nn jmp (return) cmc bchg #0,regf ; 3F Cmc jmp (return) movebb move.b regb(regs),regb(regs) ; 40 Mov B,B jmp (return) movebc move.b regc(regs),regb(regs) ; 41 Mov B,C jmp (return) movebd move.b regd(regs),regb(regs) ; 42 Mov B,D jmp (return) movebe move.b rege(regs),regb(regs) ; 43 Mov B,E jmp (return) movebh move.b regh(regs),regb(regs) ; 44 Mov B,H jmp (return) movebl move.b regl(regs),regb(regs) ; 45 Mov B,L jmp (return) movebm move.w regh(regs),d0 ; 46 Mov B,M move.b 0(targbase,d0.l),regb(regs) jmp (return) moveba move.b rega,regb(regs) ; 47 Mov B,A jmp (return) movecb move.b regb(regs),regc(regs) ; 48 Mov C,B jmp (return) movecc move.b regc(regs),regc(regs) ; 49 Mov C,C jmp (return) movecd move.b regd(regs),regc(regs) ; 4A Mov C,D jmp (return) movece move.b rege(regs),regc(regs) ; 4B Mov C,E jmp (return) movech move.b regh(regs),regc(regs) ; 4C Mov C,H jmp (return) movecl move.b regl(regs),regc(regs) ; 4D Mov C,L jmp (return) movecm move.w regh(regs),d0 ; 4E Mov C,M move.b 0(targbase,d0.l),regc(regs) jmp (return) moveca move.b rega,regc(regs) ; 4F Mov C,A jmp (return) movedb move.b regb(regs),regd(regs) ; 50 Mov D,B jmp (return) movedc move.b regc(regs),regd(regs) ; 51 Mov D,C jmp (return) movedd move.b regd(regs),regd(regs) ; 52 Mov D,D jmp (return) movede move.b rege(regs),regd(regs) ; 53 Mov D,E jmp (return) movedh move.b regh(regs),regd(regs) ; 54 Mov D,H jmp (return) movedl move.b regl(regs),regd(regs) ; 55 Mov D,L jmp (return) movedm move.w regh(regs),d0 ; 56 Mov D,M move.b 0(targbase,d0.l),regd(regs) jmp (return) moveda move.b rega,regd(regs) ; 57 Mov D,A jmp (return) moveeb move.b regb(regs),rege(regs) ; 58 Mov E,B jmp (return) moveec move.b regc(regs),rege(regs) ; 59 Mov E,C jmp (return) moveed move.b regd(regs),rege(regs) ; 5A Mov E,D jmp (return) moveee move.b rege(regs),rege(regs) ; 5B Mov E,E jmp (return) moveeh move.b regh(regs),rege(regs) ; 5C Mov E,H jmp (return) moveel move.b regl(regs),rege(regs) ; 5D Mov E,L jmp (return) moveem move.w regh(regs),d0 ; 5E Mov E,M move.b 0(targbase,d0.l),rege(regs) jmp (return) moveea move.b rega,rege(regs) ; 5F Mov E,A jmp (return) movehb move.b regb(regs),regh(regs) ; 60 Mov H,B jmp (return) movehc move.b regc(regs),regh(regs) ; 61 Mov H,C jmp (return) movehd move.b regd(regs),regh(regs) ; 62 Mov H,D jmp (return) movehe move.b rege(regs),regh(regs) ; 63 Mov H,E jmp (return) movehh move.b regh(regs),regh(regs) ; 64 Mov H,H jmp (return) movehl move.b regl(regs),regh(regs) ; 65 Mov H,L jmp (return) movehm move.w regh(regs),d0 ; 66 Mov H,M move.b 0(targbase,d0.l),regh(regs) jmp (return) moveha move.b rega,regh(regs) ; 67 Mov H,A jmp (return) movelb move.b regb(regs),regl(regs) ; 68 Mov L,B jmp (return) movelc move.b regc(regs),regl(regs) ; 69 Mov L,C jmp (return) moveld move.b regd(regs),regl(regs) ; 6A Mov L,D jmp (return) movele move.b rege(regs),regl(regs) ; 6B Mov L,E jmp (return) movelh move.b regh(regs),regl(regs) ; 6C Mov L,H jmp (return) movell move.b regl(regs),regl(regs) ; 6D Mov L,L jmp (return) movelm move.w regh(regs),d0 ; 6E Mov L,M move.b 0(targbase,d0.l),regl(regs) jmp (return) movela move.b rega,regl(regs) ; 6F Mov L,A jmp (return) movemb move.w regh(regs),d0 ; 70 Mov M,B move.b regb(regs),0(targbase,d0.l) jmp (return) movemc move.w regh(regs),d0 ; 71 Mov M,C move.b regc(regs),0(targbase,d0.l) jmp (return) movemd move.w regh(regs),d0 ; 72 Mov M,D move.b regd(regs),0(targbase,d0.l) jmp (return) moveme move.w regh(regs),d0 ; 73 Mov M,E move.b rege(regs),0(targbase,d0.l) jmp (return) movemh move.w regh(regs),d0 ; 74 Mov M,H move.b regh(regs),0(targbase,d0.l) jmp (return) moveml move.w regh(regs),d0 ; 75 Mov M,L move.b regl(regs),0(targbase,d0.l) jmp (return) halt bsr service ; 76 Hlt jmp (return) movema move.w regh(regs),d0 ; 77 Mov M,A move.b rega,0(targbase,d0.l) jmp (return) moveab move.b regb(regs),rega ; 78 Mov A,B jmp (return) moveac move.b regc(regs),rega ; 79 Mov A,C jmp (return) movead move.b regd(regs),rega ; 7A Mov A,D jmp (return) moveae move.b rege(regs),rega ; 7B Mov A,E jmp (return) moveah move.b regh(regs),rega ; 7C Mov A,H jmp (return) moveal move.b regl(regs),rega ; 7D Mov A,L jmp (return) moveam move.w regh(regs),d0 ; 7E Mov A,M move.b 0(targbase,d0.l),rega jmp (return) moveaa jmp (return) ; 7F Mov A,A addb move.b regb(regs),d0 ; 80 Add B move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addc move.b regc(regs),d0 ; 81 Add C move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addd move.b regd(regs),d0 ; 82 Add D move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adde move.b rege(regs),d0 ; 83 Add E move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addh move.b regh(regs),d0 ; 84 Add H move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addl move.b regl(regs),d0 ; 85 Add L move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addm move.w regh(regs),d0 ; 86 Add M move.b 0(targbase,d0.l),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) addaa move.b rega,regop1(regs) ; 87 Add A move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b rega,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adcb move.b regf,regop3(regs) ; 88 Adc B asr.b #1,regf move.b regb(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adcc move.b regf,regop3(regs) ; 89 Adc C asr.b #1,regf move.b regc(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adcd move.b regf,regop3(regs) ; 8A Adc D asr.b #1,regf move.b regd(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adce move.b regf,regop3(regs) ; 8B Adc E asr.b #1,regf move.b rege(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adch move.b regf,regop3(regs) ; 8C Adc H asr.b #1,regf move.b regh(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adcl move.b regf,regop3(regs) ; 8D Adc L asr.b #1,regf move.b regl(regs),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adcm move.b regf,regop3(regs) ; 8E Adc M move.w regh(regs),d0 move.l d0,a0 adda.l targbase,a0 asr.b #1,regf move.b (a0),d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) adca move.b regf,regop3(regs) ; 8F Adc A asr.b #1,regf move.b rega,d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subb move.b regb(regs),d0 ; 90 Sub B sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subc move.b regc(regs),d0 ; 91 Sub C sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subd move.b regd(regs),d0 ; 92 Sub D sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sube move.b rege(regs),d0 ; 93 Sub E sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subh move.b regh(regs),d0 ; 94 Sub H sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subl move.b regl(regs),d0 ; 95 Sub L sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subm move.w regh(regs),d0 ; 96 Sub M move.b 0(targbase,d0.l),d0 sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) subaa move.b rega,d0 ; 97 Sub A sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbb asr.b #1,regf ; 98 Sbb B move.b regb(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbc asr.b #1,regf ; 99 Sbb C move.b regc(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbd asr.b #1,regf ; 9A Sbb D move.b regd(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbe asr.b #1,regf ; 9B Sbb E move.b rege(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbh asr.b #1,regf ; 9C Sbb H move.b regh(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbl asr.b #1,regf ; 9D Sbb L move.b regl(regs),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbbm move.w regh(regs),d0 ; 9E Sbb M move.l d0,a0 adda.l targbase,a0 asr.b #1,regf move.b (a0),d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) sbba asr.b #1,regf ; 9F Sbb A move.b rega,d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) andb move.b regb(regs),d0 ; A0 Ana B and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) andc move.b regc(regs),d0 ; A1 Ana C and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) andd move.b regd(regs),d0 ; A2 Ana D and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) ande move.b rege(regs),d0 ; A3 Ana E and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) andh move.b regh(regs),d0 ; A4 Ana H and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) andl move.b regl(regs),d0 ; A5 Ana L and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) andm move.w regh(regs),d0 ; A6 Ana M move.b 0(targbase,d0.l),d0 and.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) anda move.b rega,d0 ; A7 Ana A and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xrab move.b regb(regs),d0 ; A8 Xra B eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xrac move.b regc(regs),d0 ; AA Xra C eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xrad move.b regd(regs),d0 ; AA Xra D eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xrae move.b rege(regs),d0 ; AB Xra E eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xrah move.b regh(regs),d0 ; AC Xra H eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xral move.b regl(regs),d0 ; AD Xra L eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xram move.w regh(regs),d0 ; AE Xra M move.b 0(targbase,d0.l),d0 eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) xraa moveq #0,rega ; AF Xra A move.b 16(flagptr),regf jmp (return) orab move.b regb(regs),d0 ; B0 Ora B or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) orac move.b regc(regs),d0 ; B1 Ora C or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) orad move.b regd(regs),d0 ; B2 Ora D or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) orae move.b rege(regs),d0 ; B3 Ora E or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) orah move.b regh(regs),d0 ; B4 Ora H or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) oral move.b regl(regs),d0 ; B5 Ora L or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) oram move.w regh(regs),d0 ; B6 Ora M move.b 0(targbase,d0.l),d0 or.b rega,d0 move.b d0,rega and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) oraa move.b rega,d0 ; B7 Ora A and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) cmpb cmp.b regb(regs),rega ; B8 Cmp B move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpc cmp.b regc(regs),rega ; BB Cmp C move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpd cmp.b regd(regs),rega ; BA Cmp D move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpe cmp.b rege(regs),rega ; BB Cmp E move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmph cmp.b regh(regs),rega ; BC Cmp H move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpl cmp.b regl(regs),rega ; BD Cmp L move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpam move.w regh(regs),d0 ; BE Cmp M move.l d0,a0 adda.l targbase,a0 cmp.b (a0),rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) cmpaa cmp.b rega,rega ; BF Cmp A move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rnz btst #6,regf ; C0 Rnz bne mloop ret move.b 1(pseudosp),d0 ; C9 Ret rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) popb move.b (pseudosp)+,regc(regs) ; C1 Pop B move.b (pseudosp)+,regb(regs) jmp (return) jnz move.b 1(pseudopc),d0 ; C2 Jnz addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #6,regf bne mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) jmpa move.b 1(pseudopc),d0 ; C3 Jmp addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc lea.l 0(targbase,d0.l),pseudopc jmp (return) cnz move.b 1(pseudopc),d0 ; C4 Cnz addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #6,regf bne mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) pushb move.b regb(regs),-(pseudosp) ; C5 Push B move.b regc(regs),-(pseudosp) jmp (return) adi move.b (pseudopc)+,d0 ; C6 Adi nn move.b d0,regop1(regs) move.b rega,regop2(regs) move.b regcon0e,regop3(regs) add.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rst0 move.l pseudopc,d1 ; C7 Rst 0 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp move.l targbase,pseudopc jmp (return) rz btst #6,regf ; C8 Rz beq mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) jz move.b 1(pseudopc),d0 ; CA Jz addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #6,regf beq mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) nopCB bra illegl ; CB Illegal for 8080 cz move.b 1(pseudopc),d0 ; CC Cz addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #6,regf beq mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) call move.b 1(pseudopc),d0 ; CD Call addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) aci move.b regf,regop3(regs) ; CE Aci nn asr.b #1,regf move.b (pseudopc)+,d0 move.b d0,regop1(regs) move.b rega,regop2(regs) moveq #0,d1 addx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rst8 move.l pseudopc,d1 ; CF Rst 8 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $8(targbase),pseudopc jmp (return) rnc btst #0,regf ; D0 Rnc bne mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) popd move.b (pseudosp)+,rege(regs) ; D1 Pop D move.b (pseudosp)+,regd(regs) jmp (return) jnc move.b 1(pseudopc),d0 ; D2 Jnc addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #0,regf bne mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) out moveq #0,d0 ; D3 Out nn move.b (pseudopc)+,d0 ifne diskio cmp.b #$54,d0 beq outspec cmp.b #$55,d0 beq outspec endc move.l #$ff0000,a0 move.b rega,0(a0,d0.l) jmp (return) cnc move.b 1(pseudopc),d0 ; D4 Cnc addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #0,regf bne mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) pushd move.b regd(regs),-(pseudosp) ; D5 Push D move.b rege(regs),-(pseudosp) jmp (return) sui move.b (pseudopc)+,d0 ; D6 Sui nn sub.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rst10 move.l pseudopc,d1 ; D7 Rst 10 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $10(targbase),pseudopc jmp (return) rc btst #0,regf ; D8 Rc beq mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) nopD9 bra illegl ; D9 Illegal for 8080 jc move.b 1(pseudopc),d0 ; DA Jc addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #0,regf beq mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) in moveq #0,d0 ; DB In nn move.b (pseudopc)+,d0 move.l #$ff0000,a0 move.b 0(a0,d0.l),rega jmp (return) cc move.b 1(pseudopc),d0 ; DC Cc addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #0,regf beq mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) nopDD bra illegl ; DD Illegal for 8080 sbi asr.b #1,regf ; DE Sbi nn move.b (pseudopc)+,d0 moveq #0,d1 subx.b d0,rega move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rst18 move.l pseudopc,d1 ; DF Rst 18 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $18(targbase),pseudopc jmp (return) rpo btst #2,regf ; E0 Rpo bne mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) poph move.b (pseudosp)+,regl(regs) ; E1 Pop H move.b (pseudosp)+,regh(regs) jmp (return) jpo move.b 1(pseudopc),d0 ; E2 Jpo addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #2,regf bne mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) xthl move.b regl(regs),d0 ; E3 Xthl move.b (pseudosp),regl(regs) move.b d0,(pseudosp) move.b regh(regs),d0 move.b 1(pseudosp),regh(regs) move.b d0,1(pseudosp) jmp (return) cpo move.b 1(pseudopc),d0 ; E4 Cpo addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #2,regf bne mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) pushh move.b regh(regs),-(pseudosp) ; E5 Push H move.b regl(regs),-(pseudosp) jmp (return) ani and.b (pseudopc)+,rega ; E6 Ani nn move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) rst20 move.l pseudopc,d1 ; E7 Rst 20 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $20(targbase),pseudopc jmp (return) rpe btst #2,regf ; E8 Rpe beq mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) pchl move.w regh(regs),d0 ; E9 Pchl lea.l 0(targbase,d0.l),pseudopc jmp (return) jpe move.b 1(pseudopc),d0 ; EA Jpe addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #2,regf beq mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) xchg move.w regd(regs),d0 ; EB Xchg move.w regh(regs),regd(regs) move.w d0,regh(regs) jmp (return) cpe move.b 1(pseudopc),d0 ; EC Cpe addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #2,regf beq mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) *preED bra illegl ; ED Illegal for 8080 * ED is a prefix for the popular Z-80 instructions. Some support * for them is provided by the minimal Z-80 simulation routines in * the next file. xri move.b (pseudopc)+,d0 ; EE Xri nn eor.b d0,rega move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) rst28 move.l pseudopc,d1 ; EF Rst 28 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $28(targbase),pseudopc jmp (return) rp btst #7,regf ; F0 Rp bne mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) popp move.b (pseudosp)+,regf ; F1 Pop P move.b (pseudosp)+,rega jmp (return) jp move.b 1(pseudopc),d0 ; F2 Jp addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #7,regf bne mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) di jmp (return) ; F3 Di cp move.b 1(pseudopc),d0 ; F4 Cp addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #7,regf bne mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) pushp move.b rega,-(pseudosp) ; F5 Push P move.b regf,-(pseudosp) jmp (return) oria or.b (pseudopc)+,rega ; F6 Ori nn move.b rega,d0 and.w regconff,d0 move.b 16(flagptr,d0.w),regf jmp (return) rst30 move.l pseudopc,d1 ; F7 Rst 30 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $30(targbase),pseudopc jmp (return) rm btst #7,regf ; F8 Rm beq mloop move.b 1(pseudosp),d0 rol.w #8,d0 move.b (pseudosp),d0 addq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) sphl move.w regh(regs),d0 ; F9 Sphl lea.l 0(targbase,d0.l),pseudosp jmp (return) jm move.b 1(pseudopc),d0 ; FA Jm addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #7,regf beq mloop lea.l 0(targbase,d0.l),pseudopc jmp (return) ei jmp (return) ; FB Ei cm move.b 1(pseudopc),d0 ; FC Cm addr rol.w #8,d0 move.b (pseudopc),d0 addq.l #2,pseudopc btst #7,regf beq mloop move.l pseudopc,d1 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l 0(targbase,d0.l),pseudopc jmp (return) nopFD bra illegl ; FD Illegal for 8080 cpi cmp.b (pseudopc)+,rega ; FE Cpi nn move sr,d0 and.w regcon0f,d0 move.b 0(flagptr,d0.w),regf jmp (return) rst38 move.l pseudopc,d1 ; FF Rst 38 sub.l targbase,d1 move.b d1,-2(pseudosp) rol.w #8,d1 move.b d1,-1(pseudosp) subq.l #2,pseudosp lea.l $38(targbase),pseudopc jmp (return) .end * COM3.ASM * CATHEY JAN86 ASM 68K COM SIMULATOR 8080 Z80 CPM68K * 8080 simulator. Runs CP/M 2.2 programs on MC68K under CP/M68K. Optional * tracing and Morrow HDDMA DMA buffer translating. Simulation speed of a 1.4 * MHz Z80. Not full simulation: some flag handling not quite right. Runs DDT, * LU, MAC, Morrow's FORMATMW, et al.. This file contains the special Z80 * simulation routines and the Morrow HDC/DMA support routines; see also * COM1/2/4.ASM (in this same DL). By Jim Cathey. From DDJ #111 (January 86). * 7424 bytes. ************************************************************************* * * * This file contains the special Z-80 simulation routines and * * the Morrow HDC/DMA support routines. * * * ************************************************************************* globl preED,outspec xdef mloop,illegl return equ @16,r ; JMP (return) is fast return to MLOOP. pseudopc equ @15,r ; 8080's PC is register A5. opptr equ @14,r ; Pointer to opcode dispatch table. pseudosp equ @13,r ; 8080's SP is register A3. flagptr equ @12,r ; Pointer to 8080's flag lookup table is A2. targbase equ @11,r ; Pointer to 8080's address space is A1. regs equ @11,r ; Base pointer to 8080's registers is A1. regcon0e equ 7,r ; Register based constant #$E (for speed). regcon01 equ 6,r ; Register based constant #$1. regcon0f equ 5,r ; Register based constant #$F. regcondd equ 4,r ; Register based constant #$FF. regf equ 3,r ; 8080's Flags rega equ 2,r ; 8080's Accumulator regb equ -8 ; Offsets from register base pointer for regc equ -7 ; 8080's pseudo-registers. regd equ -6 ; A & F are in Data Registers. rege equ -5 ; Pseudo-PC is kept in an Address Register. regh equ -4 regl equ -3 regop1 equ -2 ; Operand 1 for DAA storage regop2 equ -1 ; " 2 " " " data page ************************************************************************* * * * Opcode dispatch table. One longword entry per opcode of the * * target (Z-80) processor, including illegals. * * * ************************************************************************* * * * Only a few of the most popular instructions are simulated. * * Support for the Z-80 Block move instructions is provided * * as the flags for this simulation resemble those of the Z-80 * * rather than the 8080. Certain packages (notably BDS-C) check * * the flags and mistakenly assume a Z-80, then use LDIR/LDDR. * * Therefore, minimal Z-80 support is provided for these * * instructions. By no means is this a complete simulation * * of the Z-80. * * * ************************************************************************* even EDoptab dc.l 0,0,0,0,0,0,0,0 ; ED00 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED10 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED20 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED30 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED40 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED50 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED60 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED70 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED80 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; ED90 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; EDA0 dc.l 0,0,0,0,0,0,0,0 dc.l ldir,cpir,0,0,0,0,0,0 ; EDB0 dc.l lddr,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; EDC0 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; EDD0 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; EDE0 dc.l 0,0,0,0,0,0,0,0 dc.l 0,0,0,0,0,0,0,0 ; EDF0 dc.l 0,0,0,0,0,0,0,0 page text preED moveq #0,d1 ; Zero-fill high bits. move.b (pseudopc)+,d1 ; Grab next opcode. asl #2,d1 lea.l EDoptab,a0 move.l 0(a0,d1.w),-(sp) ; Do the operation. beq illgED rts illgED move.l (sp)+,d1 ; Trash the address, dec.l pseudopc ; fix PPC for ILLEGAL. bra illegl page ************************************************************************* * * * Z-80 opcode simulation routines. * * * ************************************************************************* ldir move.l d2,-(sp) move.w regb(regs),d0 ; Grab count, dec.w d0 ; adjust for DBRA later. moveq #0,d1 moveq #0,d2 move.w regh(regs),d1 ; Grab source. move.w regd(regs),d2 ; Grab dest. move.l a5,-(sp) ; Need an address reg. lea.l 0(targbase,d2.l),a5 lea.l 0(targbase,d1.l),a0 ldirlop move.b (a0)+,(a5)+ inc.w d1 inc.w d2 dbra d0,ldirlop move.l (sp)+,a5 move.w d1,regh(regs) ; Restore result registers. move.w d2,regd(regs) move.w #0,regb(regs) moveq #0,regf move.l (sp)+,d2 jmp (return) lddr move.l d2,-(sp) move.w regb(regs),d0 ; Grab count, dec.w d0 ; adjust for DBRA later. moveq #0,d1 moveq #0,d2 move.w regh(regs),d1 ; Grab source. move.w regd(regs),d2 ; Grab dest. move.l a5,-(sp) ; Need an address reg. lea.l 1(targbase,d2.l),a5 lea.l 1(targbase,d1.l),a0 lddrlop move.b -(a0),-(a5) dec.w d1 dec.w d2 dbra d0,lddrlop move.l (sp)+,a5 move.w d1,regh(regs) ; Restore result registers. move.w d2,regd(regs) move.w #0,regb(regs) moveq #0,regf move.l (sp)+,d2 jmp (return) page cpir move.w regb(regs),d0 ; Grab count, dec.w d0 ; adjust for DBRA later. moveq #0,d1 move.w regh(regs),d1 ; Grab source. lea.l 0(targbase,d1.l),a0 cpirlop inc.w d1 cmp.b (a0)+,rega dbeq d0,cpirlop seq regf move.w d1,regh(regs) ; Restore result registers. inc.w d0 move.w d0,regb(regs) tst.b regf bne cpir1 moveq #0,regf ; Not found. jmp (return) cpir1 tst d0 beq cpir2 moveq #$44,regf ; Found, in the string. jmp (return) cpir2 moveq #$40,regf ; Found, but at last place. jmp (return) page ************************************************************************* * * * Output instruction simulator for Morrow HDDMA * * * ************************************************************************* outspec move.l d3,-(sp) cmp.b #$55,d0 beq hdstart ; Start command? Do it, move.l #hdbuf,d1 ; else build first link to host buffer move.l #$50,a0 ; if it's a HDRESET command. move.b d1,(a0)+ ror.l #8,d1 move.b d1,(a0)+ ror.l #8,d1 move.b d1,(a0)+ move.l #$ff0000,a0 ; Do the output to HDDMA. adda.l d0,a0 move.b rega,(a0) move.l (sp)+,d3 jmp (return) hdstart move.l dmalink,a0 ; Move target buffer to host buffer, do adda.l targbase,a0 ; all appropriate patching of addresses. moveq #0,d1 move.b (a0)+,d1 ; Get link address. ror.l #8,d1 move.b (a0)+,d1 ror.l #8,d1 move.b (a0)+,d1 rol.l #8,d1 rol.l #8,d1 move.l d1,a0 adda.l targbase,a0 move.l a6,-(sp) lea.l hdbuf,a6 move.w #3,d1 hdloop move.b (a0)+,(a6)+ dbra d1,hdloop moveq #0,d3 ; Fix DMA address to -> target area. move.b (a0)+,d3 ror.l #8,d3 move.b (a0)+,d3 ror.l #8,d3 move.b (a0)+,d3 rol.l #8,d3 rol.l #8,d3 add.l targbase,d3 move.b d3,(a6)+ ror.l #8,d3 move.b d3,(a6)+ ror.l #8,d3 move.b d3,(a6)+ move.w #5,d1 ; Move rest of command buffer. hdloop2 move.b (a0)+,(a6)+ dbra d1,hdloop2 move.l #hdbuf,d1 move.b d1,(a6)+ ; Point host buffer to self. ror.l #8,d1 move.b d1,(a6)+ ror.l #8,d1 move.b d1,(a6)+ move.l (sp)+,a6 move.l a0,-(sp) ; Save STATUS address for return val. suba.l targbase,a0 move.l a0,dmalink ; Stash new target link address. move.l #$ff0000,a0 ; Do the output to HDDMA. adda.l d0,a0 move.b rega,(a0) move.l #hdbuf+12,a0 ; Wait for completion hdloop3 tst.b (a0) beq hdloop3 ; Fragile, but what do you want for $1.00? move.b (a0),d1 move.l (sp)+,a0 ; Grab the STATUS address in target space. move.b d1,-(a0) ; And stash status for it. move.l (sp)+,d3 jmp (return) ; Return to simulation. data even dmalink dc.l $50 ; Storage for current HDDMA command buffer. hdbuf ds.b 16 end * COM4.ASM * CATHEY JAN86 ASM 68K COM SIMULATOR 8080 Z80 CPM68K * 8080 simulator. Runs CP/M 2.2 programs on MC68K under CP/M68K. Optional * tracing and Morrow HDDMA DMA buffer translating. Simulation speed of a 1.4 * MHz Z80. Not full simulation: some flag handling not quite right. Runs DDT, * LU, MAC, Morrow's FORMATMW, et al.. This file contains the mnemonic strings * for the 8080 opcodes (used in tracing); see also COM1-3.ASM (in this same * DL). By Jim Cathey. From DDJ #111 (January '86). 8805 bytes. ************************************************************************* * * * This file contains the mnemonic strings for the 8080 opcodes. * * These are used in tracing. * * * ************************************************************************* globl mnops data page even mnops dc.l mnnop00,mnlxib,mnstaxb,mninxb,mninrb,mndcrb,mnmvib,mnrlca dc.l mnnop08,mndadb,mnldaxb,mndcxb,mninrc,mndcrc,mnmvic,mnrrca dc.l mnnop10,mnlxid,mnstaxd,mninxd,mninrd,mndcrd,mnmvid,mnral dc.l mnnop18,mndadd,mnldaxd,mndcxd,mninre,mndcre,mnmvie,mnrar dc.l mnnop20,mnlxih,mnshld,mninxh,mninrh,mndcrh,mnmvih,mndaa dc.l mnnop28,mndadh,mnlhld,mndcxh,mninrl,mndcrl,mnmvil,mncma dc.l mnnop30,mnlxis,mnsta,mninxs,mninrm,mndcrm,mnmvim,mnstc dc.l mnnop38,mndads,mnlda,mndcxs,mninra,mndcra,mnmvia,mncmc dc.l mnmovbb,mnmovbc,mnmovbd,mnmovbe,mnmovbh,mnmovbl,mnmovbm,mnmovba dc.l mnmovcb,mnmovcc,mnmovcd,mnmovce,mnmovch,mnmovcl,mnmovcm,mnmovca dc.l mnmovdb,mnmovdc,mnmovdd,mnmovde,mnmovdh,mnmovdl,mnmovdm,mnmovda dc.l mnmoveb,mnmovec,mnmoved,mnmovee,mnmoveh,mnmovel,mnmovem,mnmovea dc.l mnmovhb,mnmovhc,mnmovhd,mnmovhe,mnmovhh,mnmovhl,mnmovhm,mnmovha dc.l mnmovlb,mnmovlc,mnmovld,mnmovle,mnmovlh,mnmovll,mnmovlm,mnmovla dc.l mnmovmb,mnmovmc,mnmovmd,mnmovme,mnmovmh,mnmovml,mnhalt,mnmovma dc.l mnmovab,mnmovac,mnmovad,mnmovae,mnmovah,mnmoval,mnmovam,mnmovaa dc.l mnaddb,mnaddc,mnaddd,mnadde,mnaddh,mnaddl,mnaddm,mnaddaa dc.l mnadcb,mnadcc,mnadcd,mnadce,mnadch,mnadcl,mnadcm,mnadca dc.l mnsubb,mnsubc,mnsubd,mnsube,mnsubh,mnsubl,mnsubm,mnsubaa dc.l mnsbbb,mnsbbc,mnsbbd,mnsbbe,mnsbbh,mnsbbl,mnsbbm,mnsbba dc.l mnandb,mnandc,mnandd,mnande,mnandh,mnandl,mnandm,mnanda dc.l mnxrab,mnxrac,mnxrad,mnxrae,mnxrah,mnxral,mnxram,mnxraa dc.l mnorab,mnorac,mnorad,mnorae,mnorah,mnoral,mnoram,mnoraa dc.l mncmpb,mncmpc,mncmpd,mncmpe,mncmph,mncmpl,mncmpam,mncmpaa dc.l mnrnz,mnpopb,mnjnz,mnjmpa,mncnz,mnpushb,mnadi,mnrst0 dc.l mnrz,mnret,mnjz,mnnopCB,mncz,mncall,mnaci,mnrst8 dc.l mnrnc,mnpopd,mnjnc,mnout,mncnc,mnpushd,mnsui,mnrst10 dc.l mnrc,mnnopD9,mnjc,mnin,mncc,mnnopDD,mnsbi,mnrst18 dc.l mnrpo,mnpoph,mnjpo,mnxthl,mncpo,mnpushh,mnani,mnrst20 dc.l mnrpe,mnpchl,mnjpe,mnxchg,mncpe,mnpreED,mnxri,mnrst28 dc.l mnrp,mnpopp,mnjp,mndi,mncp,mnpushp,mnoria,mnrst30 dc.l mnrm,mnsphl,mnjm,mnei,mncm,mnnopFD,mncpi,mnrst38 page ************************************************************************* * * * Mnemonic Strings. The first character flags operands. * * Blank is nothing, A is an address, C is a constant. * * * ************************************************************************* mnnop00 dc.b " NOP$" mnlxib dc.b "ALXI B,$" mnstaxb dc.b " STAX B$" mninxb dc.b " INX B$" mninrb dc.b " INR B$" mndcrb dc.b " DCR B$" mnmvib dc.b "CMVI B,$" mnrlca dc.b " RLC$" mnnop08 dc.b " ILLEGAL FOR 8080$" mndadb dc.b " DAD B$" mnldaxb dc.b " LDAX B$" mndcxb dc.b " DCX B$" mninrc dc.b " INR C$" mndcrc dc.b " DCR C$" mnmvic dc.b " MVI C$" mnrrca dc.b " RRC$" mnnop10 dc.b " ILLEGAL FOR 8080$" mnlxid dc.b "ALXI D,$" mnstaxd dc.b " STAX D$" mninxd dc.b " INX D$" mninrd dc.b " INR D$" mndcrd dc.b " DCR D$" mnmvid dc.b "CMVI D,$" mnral dc.b " RAL$" mnnop18 dc.b " ILLEGAL FOR 8080$" mndadd dc.b " DAD D$" mnldaxd dc.b " LDAX D$" mndcxd dc.b " DCX D$" mninre dc.b " INR E$" mndcre dc.b " DCR E$" mnmvie dc.b "CMVI E,$" mnrar dc.b " RAR$" mnnop20 dc.b " ILLEGAL FOR 8080$" mnlxih dc.b "ALXI H,$" mnshld dc.b "ASHLD $" mninxh dc.b " INX H$" mninrh dc.b " INR H$" mndcrh dc.b " DCR H$" mnmvih dc.b "CMVI H,$" mndaa dc.b " DAA$" mnnop28 dc.b " ILLEGAL FOR 8080$" mndadh dc.b " DAD H$" mnlhld dc.b "ALHLD $" mndcxh dc.b " DCX H$" mninrl dc.b " INR L$" mndcrl dc.b " DCR L$" mnmvil dc.b "CMVI L,$" mncma dc.b " CMA$" mnnop30 dc.b " ILLEGAL FOR 8080$" mnlxis dc.b "ALXI S,$" mnsta dc.b "ASTA $" mninxs dc.b " INX S$" mninrm dc.b " INR M$" mndcrm dc.b " DCR M$" mnmvim dc.b "CMVI M,$" mnstc dc.b " STC$" mnnop38 dc.b " ILLEGAL FOR 8080$" mndads dc.b " DAD S$" mnlda dc.b "ALDA $" mndcxs dc.b " DCX S$" mninra dc.b " INR A$" mndcra dc.b " DCR A$" mnmvia dc.b "CMVI A,$" mncmc dc.b " CMC$" mnmovbb dc.b " MOV B,B$" mnmovbc dc.b " MOV B,C$" mnmovbd dc.b " MOV B,D$" mnmovbe dc.b " MOV B,E$" mnmovbh dc.b " MOV B,H$" mnmovbl dc.b " MOV B,L$" mnmovbm dc.b " MOV B,M$" mnmovba dc.b " MOV B,A$" mnmovcb dc.b " MOV C,B$" mnmovcc dc.b " MOV C,C$" mnmovcd dc.b " MOV C,D$" mnmovce dc.b " MOV C,E$" mnmovch dc.b " MOV C,H$" mnmovcl dc.b " MOV C,L$" mnmovcm dc.b " MOV C,M$" mnmovca dc.b " MOV C,A$" mnmovdb dc.b " MOV D,B$" mnmovdc dc.b " MOV D,C$" mnmovdd dc.b " MOV D,D$" mnmovde dc.b " MOV D,E$" mnmovdh dc.b " MOV D,H$" mnmovdl dc.b " MOV D,L$" mnmovdm dc.b " MOV D,M$" mnmovda dc.b " MOV D,A$" mnmoveb dc.b " MOV E,B$" mnmovec dc.b " MOV E,C$" mnmoved dc.b " MOV E,D$" mnmovee dc.b " MOV E,E$" mnmoveh dc.b " MOV E,H$" mnmovel dc.b " MOV E,L$" mnmovem dc.b " MOV E,M$" mnmovea dc.b " MOV E,A$" mnmovhb dc.b " MOV H,B$" mnmovhc dc.b " MOV H,C$" mnmovhd dc.b " MOV H,D$" mnmovhe dc.b " MOV H,E$" mnmovhh dc.b " MOV H,H$" mnmovhl dc.b " MOV H,L$" mnmovhm dc.b " MOV H,M$" mnmovha dc.b " MOV H,A$" mnmovlb dc.b " MOV L,B$" mnmovlc dc.b " MOV L,C$" mnmovld dc.b " MOV L,D$" mnmovle dc.b " MOV L,E$" mnmovlh dc.b " MOV L,H$" mnmovll dc.b " MOV L,L$" mnmovlm dc.b " MOV L,M$" mnmovla dc.b " MOV L,A$" mnmovmb dc.b " MOV M,B$" mnmovmc dc.b " MOV M,C$" mnmovmd dc.b " MOV M,D$" mnmovme dc.b " MOV M,E$" mnmovmh dc.b " MOV M,H$" mnmovml dc.b " MOV M,L$" mnhalt dc.b " HLT$" mnmovma dc.b " MOV M,A$" mnmovab dc.b " MOV A,B$" mnmovac dc.b " MOV A,C$" mnmovad dc.b " MOV A,D$" mnmovae dc.b " MOV A,E$" mnmovah dc.b " MOV A,H$" mnmoval dc.b " MOV A,L$" mnmovam dc.b " MOV A,M$" mnmovaa dc.b " MOV A,A$" mnaddb dc.b " ADD B$" mnaddc dc.b " ADD C$" mnaddd dc.b " ADD D$" mnadde dc.b " ADD E$" mnaddh dc.b " ADD H$" mnaddl dc.b " ADD L$" mnaddm dc.b " ADD M$" mnaddaa dc.b " ADD A$" mnadcb dc.b " ADC B$" mnadcc dc.b " ADC C$" mnadcd dc.b " ADC D$" mnadce dc.b " ADC E$" mnadch dc.b " ADC H$" mnadcl dc.b " ADC L$" mnadcm dc.b " ADC M$" mnadca dc.b " ADC A$" mnsubb dc.b " SUB B$" mnsubc dc.b " SUB C$" mnsubd dc.b " SUB D$" mnsube dc.b " SUB E$" mnsubh dc.b " SUB H$" mnsubl dc.b " SUB L$" mnsubm dc.b " SUB M$" mnsubaa dc.b " SUB A$" mnsbbb dc.b " SBB B$" mnsbbc dc.b " SBB C$" mnsbbd dc.b " SBB D$" mnsbbe dc.b " SBB E$" mnsbbh dc.b " SBB H$" mnsbbl dc.b " SBB L$" mnsbbm dc.b " SBB M$" mnsbba dc.b " SBB A$" mnandb dc.b " ANA B$" mnandc dc.b " ANA C$" mnandd dc.b " ANA D$" mnande dc.b " ANA E$" mnandh dc.b " ANA H$" mnandl dc.b " ANA L$" mnandm dc.b " ANA M$" mnanda dc.b " ANA A$" mnxrab dc.b " XRA B$" mnxrac dc.b " XRA C$" mnxrad dc.b " XRA D$" mnxrae dc.b " XRA E$" mnxrah dc.b " XRA H$" mnxral dc.b " XRA L$" mnxram dc.b " XRA M$" mnxraa dc.b " XRA A$" mnorab dc.b " ORA B$" mnorac dc.b " ORA C$" mnorad dc.b " ORA D$" mnorae dc.b " ORA E$" mnorah dc.b " ORA H$" mnoral dc.b " ORA L$" mnoram dc.b " ORA M$" mnoraa dc.b " ORA A$" mncmpb dc.b " CMP B$" mncmpc dc.b " CMP C$" mncmpd dc.b " CMP D$" mncmpe dc.b " CMP E$" mncmph dc.b " CMP H$" mncmpl dc.b " CMP L$" mncmpam dc.b " CMP M$" mncmpaa dc.b " CMP A$" mnrnz dc.b " RNZ$" mnret dc.b " RET$" mnpopb dc.b " POP B$" mnjnz dc.b "AJNZ $" mnjmpa dc.b "AJMP $" mncnz dc.b "ACNZ $" mnpushb dc.b " PUSH B$" mnadi dc.b "CADI $" mnrst0 dc.b " RST 0$" mnrz dc.b " RZ$" mnjz dc.b "AJZ $" mnnopCB dc.b " ILLEGAL FOR 8080$" mncz dc.b "ACZ $" mncall dc.b "ACALL $" mnaci dc.b "CACI $" mnrst8 dc.b " RST 8$" mnrnc dc.b " RNC$" mnpopd dc.b " POP D$" mnjnc dc.b "AJNC $" mnout dc.b "COUT $" mncnc dc.b "ACNC $" mnpushd dc.b " PUSH D$" mnsui dc.b "CSUI $" mnrst10 dc.b " RST 10$" mnrc dc.b " RC$" mnnopD9 dc.b " ILLEGAL FOR 8080$" mnjc dc.b "AJC $" mnin dc.b "CIN $" mncc dc.b "ACC $" mnnopDD dc.b " ILLEGAL FOR 8080$" mnsbi dc.b "CSBI $" mnrst18 dc.b " RST 18$" mnrpo dc.b " RPO$" mnpoph dc.b " POP H$" mnjpo dc.b "AJPO $" mnxthl dc.b " XTHL$" mncpo dc.b "ACPO $" mnpushh dc.b " PUSH H$" mnani dc.b "CANI $" mnrst20 dc.b " RST 20$" mnrpe dc.b " RPE$" mnpchl dc.b " PCHL$" mnjpe dc.b "AJPE $" mnxchg dc.b " XCHG$" mncpe dc.b "ACPE $" mnpreED dc.b " ILLEGAL FOR 8080$" mnxri dc.b "CXRI $" mnrst28 dc.b " RST 28$" mnrp dc.b " RP$" mnpopp dc.b " POP P$" mnjp dc.b "AJP $" mndi dc.b " DI$" mncp dc.b "ACP $" mnpushp dc.b " PUSH P$" mnoria dc.b "CORI $" mnrst30 dc.b " RST 30$" mnrm dc.b " RM$" mnsphl dc.b " SPHL$" mnjm dc.b "AJM $" mnei dc.b " EI$" mncm dc.b "ACM $" mnnopFD dc.b " ILLEGAL FOR 8080$" mncpi dc.b "CCPI $" mnrst38 dc.b " RST 38$" .end