@L}5 _$% l0$)$$Hȱ$ UhL" `e$$%`$%`  R@P!( L(1   Y I`  d  Ld M * @  $ % CC$$)%1 Udߥ$9%: !0 S$% DD˙`  }J)Lr 12 4 1 5 0 10 70 2 12 13227E27H11-@CHAPTER 11THE FLOATING POINT ARITHMETIC PACKAGEThe routines which} do floating point arithmetic are a part of the operating system ROM. The Atari computer uses the 6502's decimal math mode. } This mode uses numbers represented in packed Binary Coded Decimal (BCD). This means that each byte of a floating point numb}er holds two decimal digits. The actual method of representing a full number is complicated and probably not very important }to a programmer. However, for those with the knowledge to use it, the format is given below.Floating point number represe }ntation byte 0 xx excess 64 exponent + sign xx \ xx \ } xx > 10 BCD digits xx / byte 7 xx /The decimal point is shifted to left of the }MSD and the exponent is adjusted accordingly. Therefore, the decimal point doesn't need to be represented.For programming }purposes, floating point numbers can be in ASCII code. It takes up to 14 bytes to store a floating point number in this mann }er. The floating point package has a routine to convert numbers between ASCII and floating point.USE OF THE FLOATING POINT} PACKAGEThe floating point package has several routines to convert between ASCII and FP and to do the arithmetic functions.} These are the important data base variables.Floating point data base variablesFR0 $00D4,6 (212): 6 byte buffer} for floating point numberFR1 $00E0,6 (224): 6 byte buffer for floating point } numberCIX $00F2 (242): index for INBUFF addressINBUFF $00F3,2 (243): 2 byte pointer to ASCII floatin}g point numberFLPTR $00FC,2 (252): 2 byte pointer to user buffer for } floating point numberLBUFF $0580,? (1408): result buffer for FASC routineMAKING THE CALLTo do a floating point funct}ion, first set the proper pointers and JSR to the operation entry point. Below is a list of the entry points and parameters.}ASCII to floating pointConverts ASCII representation pointed to by INBUFF to FP in FR0. AFP = $D800 INBUFF = addre}ss of ASCII number CIX = buffer offset if any JSR AFPFLOATING POINT TO ASCIIConverts floating Point number in F}R0 to ASCII. The result will be in LBUFF. INBUFF will point to the ASCII number which will have the bit 7 of the last byte }set to 1. FASC = $D8E6 JSR FASCINTEGER TO FLOATING POINT CONVERSION.Converts a 2 byte unsigned integer (0 to 65535)} in FR0 to floating point in FR0. IFP = $D9AA JSR IFPFLOATING POINT TO INTEGER CONVERSION.Converts floating point }number in FR0 to 2 byte integer in FR0. FPI = $D9D2 JSR FPI BCS overflowADDITIONAdds floating point numbers in F}R0 and FR1 with result in FR0. FADD = $DA66 JSR FADD BCS out of rangeSUBTRACTIONsubtracts FR1 from FR0 with the} result in FR0. FSUB = $DA60 JSR FSUB BCS out of rangeMULTIPLICATIONMultiplies FR0 by FR1 with the result in FR0.} FMUL = $DADB JSR FMUL BCS out of rangeDIVISIONDivides FR0 by FR1 with result in FR0. FDIV = $DB28 JSR FDI}V BCS out of range or divisor is 0LOGARITHMSPuts logarithm of FR0 in FR0 LOG = $DECD LOG10 = $DED1 JSR LOG ;f}or natural log.or JSR LOG10 ;for base 10 log. BCS negative number or overflowEXPONENTIATIONPut exponentiation of F }R0 in FR0 EXP = $DDC0 EXP10 = $DDCC JSR EXP ;for e ** Zor JSR EXP10 ;for 10 ** ZPOLYNOMIAL EVALUATIONPuts!} the result of an n degree polynomial evaluation of FR0 in FR0. PLYEVL = $DD40 LDX LSB of pointer to list of floating p"}oint coefficients, ordered high to low. LDY MSB of above LDA number of coefficients in list JSR PLYEVL BCS overflow#}CLEAR FR0Sets FR0 to all zeroes ZFR0 = $DA44 JSR ZFR0CLEAR ZERO PAGE FLOATING POINT NUMBERClears user floating$} point number in page zero. ZF1 = $DA46 LDX address of zero page FP buffer JSR ZF1LOAD FR0 WITH FLOATING POINT N%}UMBERLoads FR0 with user FP number in buffer pointed to by 6502 X and Y registers or by FLPTR. After either operation belo&}w, FLPTR will point to the user FP buffer. FLD0R = $DD89 LDX lsb of pointer LDY msb JSR FLD0Ror FLD0P = $DD8D'} FLPTR = address of FP number JSR FLD0PLOAD FR1 WITH FLOATING POINT NUMBERLoads FR1 with user FP number in buffer po(}inted to by 6502 X and Y registers or by FLPTR. After either operation below, FLPTR will point to the user FP buffer. FLD1)}R = $DD98 LDX lsb of pointer LDY msb JSR FLD1Ror FLD1P = $DD9C FLPTR = address of FP number JSR FLD1PSTO*}RE FR0 IN USER BUFFERstores the contents of FR0 in user FP buffer pointed to by 6502 X and Y registers or by FLPTR. After +}either operation below, FLPTR will point to the user FP buffer. FST0R = $DDA7 LDX lsb of pointer LDY msb JSR FST0R,}or FST0P = $DDAB FLPTR = address of FP number JSR FST0PMOVE FR0 TO FR1Moves the contents of FR0 to FR1 FMO-}VE = $DDB6 JSR FMOVEThe usual use sequence of the floating point package might be to: 11load FR0 and FR1 with FP num.}bes from user specified buffersdo the maththen store FR0 in a user buffer. 10An alternative might be to: 11convert an/} ASCII representation to FP (the result is automatically in FR0).move FR0 to FR1.Convert the second ASCII number.Do the0} math.Convert FR0 back to ASCII.Store the number back into a user buffer. 10The floating point package uses the follow1}ing blocks of RAM.RAM used by floating point package $00D4 - $00FF $057E - $05FFIf the floating point pac2}kage is not used the above ram is free. 575Useful data base variables and OS equatesFR0 $00D4,6 (212): syste3}m FP bufferFR1 $00E0,6 (224): system FP bufferCIX $00F2 (242): INBUFF indexINBUFF $00F3,2 (243): po4}inter to ASCII FP bufferFLPTR $00FC,2 (252): pointer to user FP bufferLBUFF $0580 (1408): result buffer for FP5} to ASCIIAFP $D800 (55296): ASCII to FPFASC $D8E6 (55526): FP to ASCIIIFP $D9AA (55722): integer to6} FPFPI $D9D2 (55762): FP to integerZFR0 $DA44 (55876): clear FR0ZF1 $DA46 (55878): clear zero page 7}FP bufferFSUB $DA60 (55904): FR0 - FR1FADD $DA66 (55910): FR0 + FR1FMUL $DADB (56027): FR0 * FR1FDIV8} $DB28 (56104): FR0 / FR1FLD0R $DD89 (56713): load FR0 by X,Y pointerFLD0P $DD8D (56717): load FR0 by FL9}PTR pointerFLD1R $DD98 (56728): load FR1 by X,Y pointerFLD1P $DD9C (56732): load FR1 by FLPTR pointerFST0R $D:}DA7 (56743): store FR0 at buffer by X,Y pointerFST1P $DDAB (56747): store FR0 at buffer by FLPTR pointerFMOVE $;}DDB6 (56758): move FR0 to FR1EXP $DDC0 (56768): e exponentiationEXP10 $DDCC (56780): base 10 exponentiat<}ionPLYEVL $DD40 (56640): polynomial evaluationLOG $DECD (57037): natural log of FR0LOG10 $DED1 (57041):=} base 10 log of FR0 (56640): polynomial evaluationLOG $DECD (57037): natural log of FR0LOG10 $DED1 (57041):12 4 1 5 0 10 70 2 12 13227E27H12-@CHAPTER 12Boot software formatsThere are three ways which program?}s may be booted (loaded automatically upon power-up): From the disk drive From the cassette recorder From a ROM cartrid@}geDISK BOOTED SOFTWAREThe disk drive is the primary source for programs (other than the BASIC interpreter in the computeA}r ROM). A program booted from disk must be a machine language program. Secondly, the program is arranged on disk in a diffeB}rent manner from the DOS files.When the computer is first turned on, it will attempt to read a program starting at sector oC}ne in disk drive one. The exceptions are, if a cartridge prevents the disk boot process or the [START] key is pressed. The D}program is expected to use all 128 bytes of each sector.FORMAT OF A DISK BOOTED PROGRAMA disk booted program begins at seE}ctor one on the disk and continues in sequence. The first six bytes of the first sector contain program information. The reF}st of the bytes contain the program itself.Disk boot program header 1st byte $00 flags, stored in DFLAGS [$0240] G} $xx number of sectors used by program $xx address to start load $xx H} $xx initialization address 6th byte $xx 7th byte $xx start of program 11The flags byte is usually unused I}and should be zero.The load address is stored in BOOTAD [$0242,2 (578)].The initialization address is stored in DOSINI [J}$000C,2 (12)]. 10After the program is completely loaded the computer will JSR to the address stored in DOSINI for initializK}ation. It will then jump to the address stored in DOSVEC to run the program.The initialization part of the program should L}set the bottom-of-free-RAM pointer, MEMLO [$02E7,2 (743)], to point to the end of the program + 1. This will protect the proM}gram from the computer and other programs. The top-of-user-RAM pointer, APPMHI [$000E,2 (14)], is also usually set to point N}to the same address. This will protect the program from the video hardware. It must also set DOSVEC [$000A,2 (10)] to actuaO}lly point to the run address of the program. The initialization should of course end with and RTS. With DOSINI and DOSVEC pP}roperly set, the program will restart up pressing the [SYSTEM RESET] key.Rmember that the load address of the program shouQ}ld be six bytes before where you want the program to reside in memory. The six byte header will load at the specified start R}address followed by the program.CASSETTE BOOTED SOFTWAREThe cassette boot process is nearly identical to the disk boot prS}ocess. The processes are so similar that cassette boot programs can usually be transferred directly to disk and vice-versa. T} The two differences are: 11The cassette is booted instead of the disk if the [START] key is pressed when the power is turnU}ed on.A bug in early operating systems requires the booted program to turn off the cassette motor with the following commanV}d. LDA #$3C STA PACTL [$D302] 10CARTRIDGE BOOTED SOFTWAREThe Atari 800 has two cartridge slots. All other modelW}s have only one. The second cartridge slot, slot B on the 800, resides from $8000 to $9FFF. The first slot, slot A, residesX} from $A000 to BFFF. If a cartridge is inserted in a slot it will disable any RAM in the same area.Slot A, which is presenY}t in all models, can reside at the entire 16K used by both cartridges in the 800 ($8000 to $BFFF).Cartridges use the last Z}six bytes for boot information. In cartridge A these bytes are from $BFFA to $BFFF. In cartridge B they are from $9FFA to 9[}FFF.last six bytes of a cartridge $9FFA or $BFFA xx start address xx 00 \} xx flag byte xx init address $9FFF or $BFFF xx Flag byte bit 0 1 ]}= allow disk boot bit 2 0 = do not start cartridge after init bit 7 1 = cartridge takes control before OS i^}s initializedThe initialization process for the cartridge should be similar to that for disk and cassett_}e. A minimum of an RTS instruction is required.The third byte of the cartridge tailer is used by the OS to check for the p`}resence of a cartridge. This byte must be zero.A 16K cartridge will use both cartridge areas and the cartridge B tailer ara}ea can be used for program code.THE CARTRIDGE HARDWAREMost cartridges consist of two ROM chips on a single circuit board.b} Moreover, both chip sockets have identical pin assignments. In other words, the chips can be switched to opposite sockets c}and the cartridge will still work. The difference is in the chips themselves. On one chip, the A12 pin acts as an active-ld}ow chip select. On the other the A12 pin acts as an active-high chip select. Therefore the state of the A12 pin selects bete}ween the two chips.Cartridge slot pin assignments BACK 111111 543210987654f}321 --------------- --------------- SRPNMLKJHFEDCBA FRONT 15 g} 1 1 = 16K A A13 (16K only) 2 A3 B GND 3 A2 C A4 4 A1 D A5 h} 5 A0 E A6 6 D4 F A7 7 D5 H A8 8 D8 J A9 __ 9 Di}1 K A12 (CS)/(CS) 10 D0 L D3 11 D6 __ M D7 12 (CS) N A11 13 +Vj}cc P A10 14 +Vcc R NC 15 NC S NC 10The BASIC interpreter resides in the memory usek}d by cartridge A. In 400, 800 and 1200XL models, a BASIC cartridge is required to run BASIC programs. On other XL and XE mol}dels, inserting a cartridge into the slot or pressing the [OPTION] key upon power-up will disable the internal BASIC ROM. Ifm} BASIC is disabled without inserting another cartridge, the area from $A000 to $BFFF will contain RAM. 575Useful data ban}se variables and OS equatesAPPMHI $000E,2 (14): low limit of screen regionDOSVEC $000A,2 (10): run and prograo}m reset vectorDOSINI $000C,2 (12): init and reset initCARTB $8000 (32768): start of cartridge BCARTA $A000 p} (40960): start of cartridge APACTL $D302 (54018): port A control register Bit 3 contrq}ols the cassette motorrtridge APACTL $D302 (54018): port A control register Bit 3 contr12 4 1 5 0 10 70 2 12 13227E27H13-@CHAPTER 13THE SERIAL INPUT/OUTPUT INTERFACE (SIO)Most input and os}utput with the Atari computer passes through the serial I/O bus. The SIO interface is rather complicated but you are unlikelt}y to need to use it directly. CIO usually handles SIO for you. However, if you want to design your own I/O device and it's u}associated handler, you need to know how to use the SIO.SIO transfers data at a rate of 19,200 baud on separate input and ov}utput lines. The data is sent one byte at a time, LSB first, in an asynchronous format. There are also clock-in and clock-ow}ut lines. There is a signal on the clock-out line but it is not used by any present devices. The clock-in line is availablex} for synchronous transfer but is not used by the OS. The signal on the clock-out line goes high at the leading edge of each y}bit and goes low in the middle of each bit.One byte of SIO data +-+ +-+ +-+ +-+ +-+ +-+ +-+ +-+ z} | | | | | | | | | | | | | | | | clock -------------+ +-+ +-+ +-+ +-+ +-+ +-+ +-+ +------ ---------+ {} +---+ +-------+ +-------- | 0 | 1 | 0 | 1 1 | 0 0 | 1 data +-------+ +---+ |} +-------+ | | start bit stop bit}}The SIO interface is used much like the resident disk handler. In fact, it uses the same device control block as the residen~}t disk handler. After the control block parameters are set, a JSR is made to the SIO entry vector, SIOV, at $E459 (58457).}Device control block (for SIO) 11DDEVIC [$0300 (768)] Serial bus I.D. Set by handler or program.DUNIT [$0301 }(769)] Device number if more than one.DCOMND [$0302 (770)] Device command byte.DSTATS [$0303 (771)] 16Befor}e the SIO call, this byte tells whether the operation is read, write or that there is no data transfer associated with the co}mmand. After the call this byte will hold the status (error/no error code) of the operation. 10DSTATS format before comm}and 7 6 5 4 3 2 1 0 ----------------- |W|R| not used | ----------------- 11If both W} and R are 0, there is no data transfer.DBUFLO [$0304 (772)]DBUFHI [$0305 (773)] 16Points to the data buffer for either }input or output. 11DTIMLO [$0306 (774)] 16Timeout value (response time limit) in 64/60ths of a second to be set by handle}r or program. 11DBYTLO [$0308 (776)]DBYTHI [$0309 (777)] 16Number of bytes to be transferred, set by handler or program.} This parameter is not required if the DSTATS specifies no data transfer. 11DAUX1 [$030A (778)]DAUX2 [$030B (779)] 16}These parameters are sent to the device as part of the command frame. 10USING THE SIO INTERFACEAll commands on the seri}al bus must originate from the computer. The peripherals will present data on the bus only when commanded to do so.Any ope}ration on the serial bus begins with a five byte command frame. While the command frame is being sent, the command line of t}he serial connector is 0.Command frame format $xx DDEVIC $xx DCOMND $xx DAUX1 }$xx DAUX2 $xx checksumThe first four bytes of the command frame come from the device control block. the checks}um is the sum of the other four bytes with the carry added back after each addition.If both R and W of the DSTATS are 0, no} data is sent to, or expected from the peripheral, after a command frame is sent. However, the device is usually expected to} send an ACK byte ($41) after the command frame is sent. If the command frame is invalid, an NAK byte ($4E) should be sent.}If the operation is output (W = 1) the computer will send a data frame after it receives the ACK of the command frame. It t}hen expects an ACK after the data frame is sent.If the operation is an input (R = 1) the computer expects a data frame from} the peripheral after the ACK. With either input or output, a "complete" code ($43) should be sent to the computer when the }operation is finished. The "complete" code would follow the ACK of the data frame with an output operation.If the operatio}n is not completed for some reason, the peripheral should send an error code ($45) instead of "complete".SIO data frame} byte 1 $xx\ > data bytes byte n $xx/ byte n+1 $xx checksumSIO commandsREAD } $52WRITE $57STATUS $53PUT $50FORMAT $21DOWNLOAD $20READADDR $54READ SPIN $51MOTOR ON $55VERI}FY SECTOR $56Present SIO device I.D.sDISK $31 - $34 (D1 - D4)PRINTER $40RS-232-C $50 - $53 (R1 - R4)T}HE SERIAL CONNECTORThe serial connectors on the computer and all peripherials are identical. Nearly all peripherials have }two serial connectors. Either connector may be used for any connection. The serial bus is designed so that peripherials can} be daisy-chained together. The following is a diagram of the serial connector.The serial connector pin-out } 1 1 2 4 6 8 0 2 ----------- /o o o o o o\ /o o o o o o} o\ ----------------- 1 3 5 7 9 1 1 1 3 15 1 clock in (to computer) 2 } clock out 3 data in 4 GND 5 data out 6 GND 7 command (active low) 8 cassette motor control 9 proceed (active l}ow)10 +5V/ready11 audio in12 +12V (400/800)13 interrupt (active low) 14Proceed goes to pin 40 (CA1) of the PIA. It} is not used by present peripherials.Interrupt goes to pin 18 (CB1) of the PIA. It is not used by present peripherials.P}in 10 doubles as a 50mA +5V peripharal power supply and a computer ready signal. 575Useful database variables and OS eq}uatesSIOV $E459 (58457): serial port handler entryDDEVIC $0300 (768): device IDDUNIT $0301 (769): }device numberDCOMND $0302 (770): command byteDSTATS $0303 (771): status byteDBUFLO $0304 (772): data }buffer pointerDBUFHI $0305 (773):DTIMLO $0306 (774): timout valueDBYTLO $0308 (776): number of bytes }to transferDBYTHI $0309 (777):DAUX1 $030A (778): sent to deviceDAUX2 $030B (779): sent to devices {12 4 1 5 0 10 70 2 12 13227E27H14-@CHAPTER 14THE HARDWARE CHIPS27GThe previous chapters described t }he operating system of the computer. The following chapters will examine the hardware which supports the 6502 and the hardwa }re's associated software.THE GTIA CHIPThe GTIA (George's Television Interface Adapter) is the main video circuit in the c }omputer. It controls the following functions.GTIA functions 11Priority of overlapping objectsColor and brightness, in }cluding information from the antic chip.Player/missile control.console switches and game control triggers. 10THE ANTIC }CHIPThe main job of the ANTIC chip is interpreting the display buffer for the GTIA chip. The ANTIC chip is somewhat of a p }rocessor in it's own right. The program which runs it is called the display list and usually resides just before the display } buffer in memory.The ANTIC chip operates independent of the 6502. It operates by direct memory access (DMA). The ANTIC c }hip gives a HALT signal the 6502, causing the 6502 to give up control of the address bus. The ANTIC chip can then read any d }ata it needs to from memory.ANTIC chip functions 11DMA (Direct Memory Access) control.NMI (Non-Maskable Interrupt) con }trol.LIGHT PEN READINGWSYNC (wait for horizontal sync) 10THE POKEY CHIPThe most important jobs of the POKEY chip are } reading the keyboard and operating the serial port. It also has the following functions.POKEY chip functions 11Keyboar }d reading.Serial port.Pot (game paddles) reading.Sound generation.System timers.IRQ (maskable interrupt) control. }Random number generator. 10THE PIA CHIPThe PIA (Parallel Interface Adapter) is a commonly used I/O chip. It consists of } two 8 bit parallel ports with hand shaking lines. In the Atari, it has the following functions. 11Game controller port c }ontrol (bi-directional).Peripheral control and interrupt lines. 10Registers in the hardware chips are treated as memory } addresses. Many of the registers are write only. These registers cannot be read from after they are written to. Other reg }isters control one function when written to and give the status of an entirely different function when read from. Still othe }r registers are strobes. Any command which causes the address of one of these registers to appear on the address bus will ca }use their functions to be performed.The write only registers have shadow registers in RAM. Data to be put in the registers } is usually put into the shadow registers. The data in the shadow registers is automatically moved to the operating register }s during vertical blank.For register use and address, see the previous chaptes on the associated functions.rating register n12 4 1 5 0 10 70 2 12 13227E27H15-@CHAPTER 15DISPLAY LISTSThe program which runs the ANTIC chip is c}alled the display list. Much like a microprocessor, the ANTIC chip has a program counter, called the display list counter.}The display list counter is a 16 bit register. However, the six most significant bits are semi-fixed. These bits can only b}e changed with a jump instruction. The result of this is that the display list counter cannot cross a 1K memory boundary (i.}e. $A3FF to $A400) without using a jump instruction.The ANTIC chip finds the address of the display list in DLISTL [$D402 (}54274)] and DLISTH [$D403 (54275)]. SDLSTL [$0230 (560)] and SDLSTH [$0231 (561)] are the shadow registers for DLISTL and DL}ISTH.The ANTIC chip also has a memory scan counter. This register scans the display buffer for data to be interpreted and }displayed. Once loaded, the memory scan counter's 4 most significant bits are fixed. The result is that the memory scan cou}nter cannot cross a 4K memory boundary (i.e. $AFFF to $B000) without being reloaded.DISPLAY LIST INSTRUCTIONSThere are th}ree basic instructions in the display list. The type of instruction is determined by bits 0,1,2 and 3 of an instruction byte}. The other four bits give auxilliary parameters for the instruction. Bit 7 always enables a display list interrupts (DLIs)}.Display list instruction format 7 6 5 4 3 2 1 0 ----------------- |I|n|n|n|0|0|0|0| ----------------- } \ / \ / --- ------ | | | 0 = display blank lines | 0-7 =} number of blank lines (1-8) 7 6 5 4 3 2 1 0 ----------------- |I|W| | |0|0|0|1| ----------------- } | \ / | ------ | | | 1 = jump (3 byte instruction) | 0 = jum}p and display one blank line 1 = jump and wait for vertical blank 7 6 5 4 3 2 1 0 ----------------- |I|}R|H|V|M|M|M|M| ----------------- | | | | \ / | | | | ------ | | | | | | | | | 2-F = displ}ay one line of graphics in | | | | ANTIC mode 2-F | | | 1 = horizontal scroll enabled | | | | | }1 = vertical scroll enabled | | | 1 = reload memory scan counter with next two bytes | 1 = display list i}nterrupt, all instructionsIn the display instruction, the ANTIC mode is different from the CIO graphics mode. However, ea}ch CIO graphics mode uses a particular ANTIC mode. Below are descriptions of the ANTIC modes with their associated graphics }(CIO) modes.ANTIC MODE 2 (Graphics 0)Uses 8 pixel by 8 pixel characters, 40 characters horizontal, 8 TV scan lines verti}cal. Only one color can be displayed at a time.ANTIC MODE 38 X 10 pixel, Graphics 0 type characters. This mode requires} a custom character set. The advantage is that it allows true decenders. The custom C-set is still 8 X 8 pixels. Lower-cas}e letters with decenders have the bottom row of pixels put on the top row.Lower-case "y" for ANTIC mode 3 C-set } Display ---------- ---------- | XXXXX | | | | | | | | }| | | | XX XX | | XX XX | | XX XX | | XX XX | | XX XX | | XX XX | | XXXXX |} | XXXXX | | XX | | XX | ---------- | XXXXX | | | } ----------ANTIC MODE 4 (graphics 12 on XL and XE)This mode has characters the same size as graphics 0. However, the} characters are only 4 X 8 pixels. This gives only half the horizontal resolution of graphics 0. The advantage is that up t}o four colors of "graphics 0" characters can be displayed at once. This mode also requires a custom C-set. Below is a compa}rison of the normal C-set to one which works with the ANTIC 4 mode.Upper-case "A" for ANTIC modes 2 and 4 mode 2 } mode 4 ---------- ---------- | | | | | XX | | yy | | XXXX | } | yy | | XX XX | |xx zz | | XX XX | |xx zz | | XXXXXX | |xxyyzz | | XX XX | } |xx zz | | | | | ---------- ---------- 11xx, yy and zz represent two bit binary number}s, controlling one pixel each. These numbers determine which color register a pixel is assigned to: (COLOR0, COLOR1, COLOR2 }or COLOR3). 10ANTIC mode 5Antic mode five is identical to ANTIC mode 4 except the characters are displayed twice as tall}. This makes only 12 lines on the screen.ANTIC MODE 6 (Graphics 1)This mode uses 8 X 8 pixel characters except they are }displayed twice as wide as in ANTIC mode 2. There are 3 colors available at once but only one case (upper or lower) can be d}isplayed at a time. The data base variable CHBAS [$02F4 (756)] controls the character, [$E0 (224) = upper-case, $E2 (226) = }lower-case]The color/character is controlled by either the color statement or the ATASCII number of the character printed. } Control characters are controlled by COLOR0, upper-case characters by COLOR1 and lower-case characters by COLOR2. Remember }that all characters print as upper-case alpha characters, but of different colors.ANTIC MODE 7 (Graphics 2)This mode is i}dentical to mode 6 except the characters are displayed twice as tall. This results in only 12 lines possible on the screen.}ANTIC MODE 8 (Graphics 3)This is the first graphics (non-character) mode. This mode, as other non-character graphics mode}s do, uses data in the display buffer as a bit map to be displayed.A command to display in mode 8 will cause the ANTIC chip} to read the next 10 bytes in the display buffer. Each pair of bits will control one pixel as in mode 4. However, the pixel}s are blocks the same size as a Graphics 0 (ANTIC 2) characters.ANTIC MODE 9 (Graphics 4)This is similar to ANTIC mode 8 }except each byte controls 8 pixels (instead of 4) and only one color can be displayed at a time. The pixels are also half th}e size of those in ANTIC mode 8.ANTIC MODE A (Graphics 5)This mode uses 20 bytes per line/command. As in ANTIC mode 8, e}ach pair of bits controls one pixel. The result is that the pixels are the same size as in ANTIC mode 9 but four colors can }be displayed at once.ANTIC MODE B (Graphics 6)As in mode A, there are 8 pixels per byte and only one color. The pixels a}re half the size as in mode A.ANTIC MODE CLike mode B except the pixels are half as tall (only one T.V. line).ANTIC MOD}E D (Graphics 7)40 Bytes per line, each byte controls 4 pixels. The pixels are 1/4 as large as in ANTIC mode 8 (Graphics 3}).ANTIC MODE E (Graphics 15 on XL and XE)Like mode D except the pixels are half as tall (one T.V. line). Antic mode E is} sometimes called Graphics 7.5ANTIC mode F (Graphics 8, 9, 10 and 11)This is the highest resolution mode. Pixels are 1/8} the size of ANTIC mode 8 or mode 2 characters. It uses 40 bytes per line, each byte controlling 8 pixels, unless the GTIA c}hip intervenes. Only one color can be displayed at a time.D:CHAP15.1, each byte controlling 8 pixels, unless the GTIA cJDISPLAY LIST EXAMPLESWhen CIO opens a channel to the screen, it sets up the proper display list for the ANTIC chip. The fo}llowing are the things CIO must handle when setting up the display list.Display list duties as used by CIO 11display a }certain number of blank lines at the top of the screen.Load the memory scan counter with the address of the display data bu}ffer.Display the required number of lines in the required ANTIC mode.Set up a jump instruction if the display list crosse}s a 1K memory boundary.Set up a reload-memory-scan-counter instruction if the display data buffer crosses a 4K memory bound}ary. 10CIO assumes that the display data buffer will butt against an 8K memory boundary. If a program causes the display b}uffer to cross a 4K boundary (by changing RAMTOP [$006A (106)] to point to an address which is not at an 8K boundary) the scr}een will be scrambled. This is not usually a problem if the graphics mode doesn't require a large block of memory.SAMPLE D}ISPLAY LISTBelow is an example of a Graphics 0 display list as CIO would set it up.Display list for Graphics 0assumi}ng BASIC starts at $A000address instruction explanation Dec. Hex.$9C20 112 $70 \ 112 }$70 >---- 24 blank lines (8 each command) 112 $70 / 66 $42 ----- load memory scan counter with $9C}24 64 $40 \__ next two bytes and display one line 156 $9C / \ of ANTIC 2 characters 2 $0}2 -\ | 2 $02 | \- address of display data buffer 2 $02 | 2 $02 \--- 2nd ANTIC 2 }instruction - --- 2 $02 ----- 24th ANTIC 2 instruction 65 $41 \ } 32 $20 >---- jump back to start of list 156 $9C /$9C40 ??? ?? first byte of display data buf}fer --- --$9FFF ??? ?? last byte of buffer$A000 start of ROMA display li}st for a higher resolution graphics mode would require more instructions and might cross a 1K boundary. It would then includ}e a jump instruction to cross the boundary.MULTIPLE DISPLAYSIt is possible to set up multiple displays and use one at a t}ime. The technique of changing from one display to another is called page flipping. Below is the simplest way to set up two} displays.setting up two displays 11Call a graphics mode through CIO or by using a BASIC GRAPHICS command.Store the d }isplay list pointers, SDLSTL and SDLSTH, and the CIO screen pointer, SAVMSC [$0058,2 (88)].Move the start-of-ROM pointer, R }AMTOP [$006A (106)] to below the current display list. RAMTOP is a one byte pointer so it changes in increments of one page  }(256 bytes).make another graphics call as in the first step.store the new display list pointer and CIO screen pointer. 1 }0This will set up two displays, each with it's own display list. If the displays are in the same graphics mode, or you will } not make any changes in the displays with CIO commands, (PLOT, PRINT, etc.) you can flip between the two simply by changing }the display list pointer.If the screens are in the same graphics mode and you want to change which one to do CIO commands t}o, Change the CIO screen pointer, SAVMSC [$0058,2 (88)]. This way, you can display one screen while drawing on the other.I}f you want to do CIO commands to screens of different graphics modes, you will have the move RAMTOP and do a graphics call to} change screens.If your manipulation of RAMTOP causes the display data buffer to cross a 4K boundary, the screen may be scr}ambled.DISPLAY LIST INTERRUPTSDLIs are not used by the operating system. However, other programs can initiate and use th}em. Use the following steps to set up display list interrupts.Setting up DLIs 11Set bit 7 of the display list instruct}ion for the line before you want the interrupt to occur. (The interrupt routine should set WSYNC and wait for the next line }to execute.)Set bit 7 of NMIEN [$D40E (54286)] to enable DLIs.Set the DLI routine vector, VDSLST [$0200,2 (512)] to point} to your machine language DLI routine. 10Your DLI routine should set WSYNC [$D40A (54282)]. STA WSYNC will do. THis will }cause the 6502 to wait for the next horizontal sync. This will keep the DLI routine from changing something in the middle of} a T.V. line.The DLI routine must end with an RTI instruction.SCROLLINGScrolling is controlled by a combination of scro}ll position registers, and changing the memory scan counter. Basically, course scrolling is done by reloading the memory sca}n counter and fine scrolling is done by changing the scroll registers.VERTICAL SCROLLINGVertical scrolling is very simple}. Follow the steps below to set up vertical scrolling of graphics.Steps to use vertical scrolling 11Set bit 4 of the f}irst byte of the display list instruction for each line to be scrolled.Put the number of T.V. lines to offset the graphics }vertically in the vertical scroll register, VSCROL [$D405 (54277)] 10The vertical scroll register can offset the graphics u}pward by 0 - 7 T.V. lines in the 24 line graphics modes (ANTIC modes 2 and 4). In 12 line graphics modes (ANTIC modes 5 and }7) it can vertically offset the graphics by 0 - 15 T.V. lines. To offset the graphics an 8th (or 16th) line, the scroll regi }ster is reset to 0 and the memory scan counter is reloaded with the address of the next line of graphics in the display data !}buffer. If the entire screen is being scrolled, the load-memory-scan-counter command (near the beginning of the display list"}) is changed to point to the address of the second line of graphics.HORIZONTAL SCROLLINGHorizontal scrolling works much l#}ike vertical scrolling. It is enabled by setting bit 5 of the instruction for each line to be scrolled. The horizontal scro$}ll register, HSCROL [$D404 (54276)], sets the offset. The small difference is that graphics are moved twice as far per chang%}e (two graphics 8 pixels instead of one). Also, when HSCROL = 0 the graphics are offset beyond the left edge of the screen b&}y 16 color clocks (32 Graphics 8 pixels). When HSCROL = 15, the graphics line is shifted one color clock (2 Graphics 8 pixel'}s) to the left of the screen.The big difference is that the memory scan counter gets messed up. This means that you must u(}se a reload-memory-scan-counter command for each line of graphics. This is a major modification of the display list. It wil)}l require you to move and build the list yourself.The advantage of this is that you can have a scrolling window in a large *}graphics map. The technique is to move the window by reloading the memory scan counter, then fine scrolling to the invisible+} bytes beyond the edges of the screen. 575useful data base variables and OS equatesSAVMSC $0058,2 (88): pointer,} to current screen for CIO commandsRAMTOP $006A (106): start-of-ROM pointer (MSB only)VDSLST $0200,2 (512): DLI-} vectorRAMSIZ $02E4 (740): permanent start-of-ROM pointer (MSB only)DLISTL $D402 (54274.}): display list pointer low byteDLISTH $D403 (54275): " high byteHSCROL $D404 (54276): horizontal scroll r/}egisterVSCROL $D405 (54277): vertical scroll registerNMIEN $D40E (54286): NMI enable (DLIs)Shadow registers0}SDLSTL $0230 (560): DLISTLSDLSTH $0231 (561): DLISTH0E (54286): NMI enable (DLIs)Shadow registersF12 4 1 5 0 10 70 2 12 13227E27H16-@CHAPTER 16PLAYER AND MISSILE (PM) GRAPHICSPlayers and missiles (c2}alled sprites on some computers) are movable objects which are independent of the normal graphics.Player and missile graphi3}cs are fairly straight forward. Once the computer is set-up for PM graphics, five 8-pixel-wide columns can be displayed on t4}he screen. The horizontal resolution (width of each pixel) and the vertical resolution (number of scan lines per pixel) are 5}variable. The horizontal position of each column is determined by it's horizontal position register. Each column is simply 6}a representation of a bit map in a certain block of memory. If you want to draw an object on the screen, you simply put a bi7}t map representing it in the proper memory block. The vertical position of an object is determined by the location of it's b8}it map in memory. For example, if you want to draw a happy face in the middle of the screen, you put a happy face bit map in9} the middle of one of the memory blocks controlling one of the columns.One column (player) displayed on the screen :} ---------- first byte of a block | | | | ------------------------------ | | ;} | | | | | | | | | | | | | <} | | | | | | | | | | | ++++ | visible | | =}| + + | | | |+ + + +| | | |+ +| area | | |++ ++| >} | | |+ ++++ +|--object | | | + + | bit map | | | ++++ | | | ?} | | | | | | | | | | | -------------------@}----------- | | | | ---------- last byte of a block Horizontal positionsA}$00 $30 $CE $FF(0) (48) (206) (255) | | | B} | | Left edge right edge | | | Far left C} far rightTo move the happy face vertically you would move the entire bit map in memory. To move the happy face horizontaD}lly you change the number in the horizontal position register for the proper player.One of the players can be (and often isE}) split into four columns of two pixels wide each. These columns are then called missiles. In this case, each missile has iF}t's own horizontal position register.SETTING UP PM GRAPHICSPM graphics are enabled by the direct memory access control rG}egister, DMACTL [$D400 (54272)]. The program using PM graphics will usually use the shadow register, SDMCTL [$022F (559)].H}DMACTL (SDMCTL) 7 6 5 4 3 2 1 0 ----------------- |0|0| control | ----------------- bits 5 1 I}= enable display list reading 4 0 = one line player resolution 1 = two line player resolution 3 1 =J} enable four players 2 1 = enable fifth player or missiles 1 & 0 00 = no background 01 = narrow backgrounK}d (128 color clocks, 1 color clock equals 2 GRAPHICS 8 pixels) 10 = normal background (160 color clockL}s) 11 = wide background (192 color clocks)Normally, bits 5 and 1 are set to 1. Bits 4, 3 and 2 are used to enableM} players and/or missiles accordingly.Once DMACTL is set up for the type of PM graphics to enable, the graphics control regiN}ster, GRACTL [$D01D (53277)], is used to actually enable the PM graphics.GRACTL 7 6 5 4 3 2 1 0 ----------------O}- |not used | | | | ----------------- Bits 2 1 = latch paddle triggers 1 1 = enable four playersP} 0 1 = enable fifth player or missilesIf only DMACTL is set up, the ANTIC chip will access memory for PM graphics bQ}ut will not display them.Next, the memory area used for the PM bit maps must be set. This block must start on a 2K (8 pageR}) boundary if single line resolution is used and a 1K (4 page) boundary for two line resolution.The page number where the bS}it map starts is stored in the PM base register, PMBASE [$D407 (54279)]. For one line resolution this number will be a multiT}ple of 8. For two line resolution it will be a multiple of 4. PMBASE holds the MSB of the address of the PM bit map. The LU}SB will always be 0 so it need not be specified.The PM bit maps 2 line resolution 128 bytes (1/2 page) perV} player ----------------- start + 0 | |\ +---------------+ 1-1/2 page | | W}(384 bytes) +===============+ unused | |/ +---------------+ +$180 (384) |M3 |M2 |M1 |M0 | X}fifth player or missiles +===============+ +$200 (512) | player 0 map | +---------------+ +$280 (640) Y}| player 1 map | +===============+ +$300 (768) | player 2 map | +---------------+ +$380 (896) | playeZ}r 3 map | +===============+ +$400 (1024) 1 line resolution 256 bytes (1 page) per player ------[}----------- start + 0 | |\ + + | | +===============+ | \} | 768 bytes + + | | (3 pages) +===============| | ]} | unused + + | |/ +===============+ +$300 (768) | | | | | fifth p^}layer +M3 |M2 |M1 |M0 | or missiles | | | | | +===============+ +$400 (1024) | | _} + player 0 map + | | +===============+ +$500 (1280) | | + player 1 map `} + | | +===============+ +$600 (1536) | | + player 2 map + | a} | +===============+ +$700 (1792) | | + player 3 map + | | +======b}=========+ +$800 (2048)D:CHAP16.1792) | | + player 3 map + | | +======'Example of using P/M graphics in BASIC 110 REM ---LABEL REGISTERS ETC10 LINES=220 VERT=12022 IF LINES=2 THEN VERT=VERT/d}230 PM0=102432 IF LINES=2 THEN PM0=PM0/240 HORIZ=12050 PCOLR0=70460 SDMCTL=55970 SIZEP0=5325680 HPOSP0=5324890 SDMCTLe}=559100 PMRAM=PEEK(106)-16110 PMBASE=54279120 GRACTL=53277130 PMSTART=PMRAM*256+PM0200 REM ---SET REGISTERS210 POKE SDMf}CTL,62212 IF LINES=2 THEN POKE SDMCTL,46220 POKE SIZEP0,1230 POKE HPOSP0,HORIZ240 POKE PCOLR0,88250 POKE PMBASE,PMRAM26g}0 POKE GRACTL,3300 REM ---DRAW PLAYER310 POKE PMSTART+VERT,60320 POKE PMSTART+VERT+1,66330 POKE PMSTART+VERT+2,165340 POq}dB:CHAP11 B4>CHAP12 B3rCHAP13 BCHAP14 B:CHAP15 B<CHAP15 1 B21CHAP16 BEcCHAP16 1 B*CHAP17 B7CHAP18 BCHAP19 B.-CHAP20 B[README KE PMSTART+VERT+3,129350 POKE PMSTART+VERT+4,195360 POKE PMSTART+VERT+5,189370 POKE PMSTART+VERT+6,66380 POKE PMSTART+VERr}T+7,60 10The above program will draw a happy face in about the middle of the screen using player 0. To move the player hors}izontally, poke a different number into HPOSP0. To draw the player in a different vertical position, change VERT. To use a t}different player or missile, use the memory maps above to find the starting address of the player you want to use. For exampu}le, to use player 1 change line 40 to PM1=1280. Then change line 130 to PMSTART=PMRAM*256+PM1. The variable "LINES" determiv}nes the vertical resolution. The number poked into SIZEP0 determines the width.P/M PRIORITYThe priorities of players, mw}issiles and non-P/M graphics can be controlled by the PRIOR register [$D10B (53275)] and its shadow register, GPRIOR [$26F (6x}23)]. Objects with higher priority will appear to move in front of lower priority objects. The format of PRIOR is as followy}s:PRIOR bit assignment 7 6 5 4 3 2 1 0 ----------------- | | | | | | | | | ----------------- 1z} 6 3 1 8 4 2 1 2 4 2 6 8Bits 7-6 Control the GTIA graphics modes. 00 = normal 01 = mode{} 9 10 = mode 10 11 = mode 11 5 1 = multiple color player enable. Permits overlappin|}g of players 0 and 1 or 2 and 3 with a third color in the overlapped region. 4 1 = fifth}} player enable. All missiles will assume the color controlled by COLOR3 [$2C7 (711)]. missiles ~}are positioned together to make the fifth player. 3-0 Controls the priorities of players, }missiles 20and other graphics. Objects with higher priority will appear to move in front of those with lower priority.Th}e following chart may need some clarification. In the chart: 22PM0 = player 0 and missile 0 C0 = COLOR0, plotted graphic}s controlled by color register 0 in the SETCOLOR command. P5 = all four missiles when combined into one p}layer.BAK = the background, known as COLOR4 or color register 4 in the SETCOLOR command. 10Etc.Bits 0-3 of PRIO}R and P/M prioritiesBit 3=1 2=1 1=1 0=1 C0 C0 PM0 PM0 highest C1 C1 PM1 PM1 }priority PM0 C2 C0 PM2 PM1 C3+P5 C1 PM3 PM2 PM0 C2 C0 PM3 PM1 C3+P5 } C1 C2 PM2 PM2 C2 C3+P5 PM3 PM3 C3+P5 lowest BAK BAK BAK BAK priorityOnly one p}riority bit can be set at a time. If more than one priority bit is 1, overlapping areas of conflicting priorities will turn }black.COLLISIONSEach player or missile has a register showing overlap (collisions) with other objects. Each player has t}wo registers assigned to it; one to detect collisions with other players and one to detect collisions with plotted objects. }Likewise each missile has two registers; one to detect collisions with players and one to detect collisions with plotted obje}cts. Careful use of these 16 registers can detect any type of collision.Each register uses only the lower 4 bits. The bi}ts which equal 1 tell what the associated object has collided with. For example, to detect collisions of player 1 to other p}layers examine P1PL [$D00D (53261)].P1PL, player 1 to player collisions 7 6 5 4 3 2 1 0 -----------------P1PL} |unused | | | | | ----------------- 8 4 2 1 3 = 1 collision with player 3 2 = 1 collision wi}th player 2 1 = 1 invalid 0 = 1 collision with player 0Etc.When looking for collisions with plotted objects,} the bit number tells what color register is assigned to the object the collision was with. For example, to detect collision}s between player 1 and plotted objects (officially called the play field), P1PF [$D005 (53253)] is used.P1PF, player 1 to }ploted object collisions 7 6 5 4 3 2 1 0 -----------------P1PF |unused | | | | | ----------------- } 8 4 2 1 3 = 1 collision with COLOR3 2 = 1 " COLOR2 1 = 1 " COLOR1 0 =} 1 " COLOR0Etc.Once a collision occurs it remains indicated in its collision register. To clear out all c}ollision registers, write anything to HITCLR [$D01E (53278)]. STA HITCLR or POKE 53278,0 will do.Useful database variabl}es and OS equates 575HPOSP0 $D000 (53248): write: horizontal position of player 0M0PF " " : read: mis}sile 0 to plotted graphics collisionsHPOSP1 $D001 (53249): write: horizontal position of playe}r 1M1PF " " : read: missile 1 to plotted graphics collisionsHPOSP2 $D002 (5325}0): write: horizontal position of player 2M2PF " " : read: missile 2 to plotted graphics } collisionsHPOSP3 $D003 (53251): write: horizontal position of player 3M3PF " " : read: missile 3 t}o plotted graphics collisionsHPOSM0 $D004 (53252): write: horizontal position of missile 0P0P}F " " : read: Player 0 to plotted graphics collisionsHPOSM1 $D005 (53253): write: horizontal position of }missile 1P1PF " " : read: Player 1 to plotted graphics collisionsHPOSM2 $D006 (53254): write: horizontal} position of missile 2P2PF " " : read: Player 2 to plotted graphics collisionsHPOSM3 $D007 (53255): writ}e: horizontal position of missile 3P3PF " " : read: Player 3 to plotted graphics collisionsSIZEP0 $D008 }(53256): write: size of player 0M0PL " " : read: missile 0 to player collisionsSIZEP1 $D009 (53257): wri}te: size of player 1M1PL " " : read: missile 1 to player collisionsSIZEP2 $D00A (53258): write: size of }player 2M2PL " " : read: missile 2 to player collisionsSIZEP3 $D00B (53259): write: size of player 3M3P}L " " : read: missile 3 to player collisionsSIZEM $D00C (53260): write: widths for all missilesP0PL } " " : read: player 0 to other player collisionsGRAFP0 $D00D (53261): write: player 0 graphics (used by OS)}P1PL " " : read: player 1 to other player collisionsGRAPF1 $D00E (53262): write: player 1 graphicsP2PL } " " : read: player 2 to other player collisionsGRAFP2 $D00F (53263): write: player 2 graphicsP3PL " } " : read: player 3 to other player collisionsGRAPF3 $D010 (53264): write: player 3 graphicsGRAFM $D011 }(53265): write: missile graphics (used by OS)COLPM0 $D012 (53266): color for player/missile 0COLPM1 $D013 (53267): } 1COLPM2 $D014 (53268): 2COLPM3 $D015 (53269): } 3COLPF0 $D016 (53270): color register 0COLPF1 $D017 (53271): 1COLPF2 $D018 (53272): } 2COLPF3 $D019 (53273): 3COLBK $D01A (53274): background color (register 4)PRIOR $D01B } (53275): priority select, GTIA modesGRACTL $D01D (53277): graphics controlHITCLR $D01E (53278): writing anything} clears all collision bitsDMACTL $D400 (54272): direct memory access (DMA) controlPMBASE $D407 (54279): start of P/}M memoryShadow registersSDMCTL $022F (559): DMACTLGPRIOR $026F (623): PRIORPCOLR0 $02C0 (704): COLPM}0PCOLR1 $02C1 (705): COLPM1PCOLR2 $02C2 (706): COLPM2PCOLR3 $02C3 (707): COLPM3COLOR0 $02C4 (708)}: COLPF0COLOR1 $02C5 (709): COLPF1COLOR2 $02C6 (710): COLPF2COLOR3 $02C7 (711): COLPF3COLOR4 $02C8 } (712): COLBK $02C5 (709): COLPF1COLOR2 $02C6 (710): COLPF2COLOR3 $02C7 (711): COLPF3COLOR4 $02C8 12 4 1 5 0 10 70 2 12 13227E27H17-@CHAPTER 17SOUNDGenerating sound can be very simple. For simple s!}ounds there are four audio channels, each controlled by two control registers.GENERATING SOUNDSTo generate a sound in cha!}nnel 1, put the frequency and volume codes into the frequency and control registers. The frequency register for channel 1, A!}UDF1 [$D200 (53760)] can have any number from 0 to $FF (255). 0 causes the highest frequency; 255 causes the lowest. The vo!}lume/noise (control) register for channel 1, AUDC1 [$D201 (53761)] is more complicated.Audio channel control (volume/noise!}) register 11 7 6 5 4 3 2 1 0 -----------------AUDCx | noise | volume| ----------------- 1 6!} 3 1 8 4 2 1 2 4 2 6 8 10The noise bits can have various values. The best way to learn to use them is by e!}xperimentation. The technical details of the polynomial counters which generate the noise has little bearing on what is hear!}d. The two special values of interest are: $1 (volume+16 in decimal), which causes a DC voltage proportional to the volume b!}its and; $A (volume+160), which causes a pure tone (square wave). The volume bits select the relative volume, 0=off. Theref!}ore, the number, $A8 (168 [8+160]) in AUDC1, will cause the frequency selected by AUDF1 to be a pure tone of medium volume.!}27GIn BASIC the dirty work is done fore you. The SOUND command will do all the calculations for you. The Sound command for!}mat is shown below.The BASIC sound command format SOUND channel,frequency,noise,volumeThe channel numbers is 0 to 3 i!}nstead of 1 to 4. The frequency, 0 to 255, is put into the frequency register. The noise is put into the high bits of the ch!}annel control register with volume in the low bits. Therefore... SOUND 0,125,10,8will produce a pure tone of medium freq!}uency and volume in channel 0 (called channel 1 in assembly language).ADVANCED SOUND27HThe Audio Control register, AUDCT!}L [$D208 (53768)], (not to be confused with the four audio channel control registers), adds more control for assembly languag!}e programmers. Again, to go into technical details will be less productive than experimentation.The audio control registe!}r. (AUDCTL) 7 6 5 4 3 2 1 0 ----------------- AUDCTL | | | | | | | | | ----------------- !}1 6 3 1 8 4 2 1 2 4 2 6 8 7 0 = 17 bit polynomial noise 1 = 9 bit below polynomial noi!}se 6 0 = clock channel 1 with 64 KHz 1 = clock channel 1 with 1.79 MHz 5 0 = clock channel 3 wit!}h 64 KHz 1 = clock channel 3 with 1.79 MHz 4 0 = clock channel 2 with 64 KHz 1 = clock channel!} 2 with channel 1 3 0 = clock channel 4 with 64 KHz 1 = clock channel 4 with channel 3 2 1 = ins!}ert logical high-pass filter in channel 1, clocked by channel 3 1 1 = insert logical high-pass filte!}r in channel 2, clocked by channel 4 0 0 = 64 KHz main clock 1 = 16 KHz main clock 11Al!}l bits of AUDCTL are normally zero. The BASIC sound command causes it to be reset to zero. 10By clocking one channel with !}another, the range can be increased. This essentially allows two channels with twice the range as each of the four normal ch!}annels. This is called 16 bit sound.To calculate exact frequencies, use the following formulas. The exact clock frequenci!}es are also given if more accuracy is needed. The clock frequencies are acquired by dividing the signal from the TV color-bu!}rst crystal. This crystal has a frequency of 3.579545 MHz.Clock frequencies: 1.7897725 MHz (color-burst/2) !} 63.920446 Khz (color-burst/56) 15.699759 KHz (color-burst/228)Formulas: For 1.79 MHz !} clock clock f = ------------ f = ------------ 2(AUDFn + 7) !} 2(AUDFn + 4) 16 bit 8 bit AUDFn is the number in the audio frequency register. For!} 16 KHz and 64 KHz clock f = ------------ 2(AUDFn + 1)AUDIO TIMER INTERRUPTSW!}hen the audio timers count down to zero they generate IRQ interrupts (if enabled). The timers can be reset by writing any nu!}mber to STIMER [D209 (53769)].THE CONSOLE SPEAKERThe console speaker is where key clicks and the cassette signals come f!}rom. On XL and XE models this speaker is heard through the TV speaker. It is operated by toggling bit 3 of CONSOL [$D01F (5!}3279). This bit always reads 0 but it is actually set to 1 during vertical blank.Useful data base variables and OS equat!}esCONSOL $D01F (53279): bit 3 controls console speakerAUDF1 $D200 (53760): Audio frequency 1AUDC1 $D!}201 (53761): audio control 1AUDF2 $D202 (53762):AUDC2 $D203 (53763):AUDF3 $D204 (53!}764):AUDC3 $D205 (53765):AUDF4 $D206 (53766):AUDC4 $D207 (53767):AUDCTL $D208 (537!}68): general audio controlSTIMER $D209 (53769): audio timer reset207 (53767):AUDCTL $D208 (537 M12 4 1 5 0 10 70 2 12 13227E27H18-@CHAPTER 18THE JOYSTICK PORTSThe joystick ports are the I/O ports %}of the PIA chip. This means that they are bidirectional, capable of output as well as input. The joystick ports are usually%} set up for input. To read them, simply read the port registers. PORTA [$D300 (53016)] will read joystick ports 1 and 2. P%}ORTB [$D301 (54017)] will read joystick ports 3 and 4. Joystick ports 3 and 4 are used for memory control on the XL/XE model%}s and don't have external connectors.Each bit of each port can be configured independently for input or output. To reconfi%}gure a port, the port control registers, PACTL and PBCTL [$D302 (54018) and $D303 (54019)], are used. The port control regis%}ters also control some lines on the serial I/O connector.The port control registers 11 7 6 5 4 3 2 1 0PACTL %} -----------------or |n 0 1 1 n n 0 n|PBCTL ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 %} 8 bits PACTL 7 Peripheral A interrupt status. Set by peripheral interrup%}t; reset by reading PORTA. 3 Cassette motor control (0 = on: 1 = off). 2 0 = PORTA is now port A direction co%}ntrol. Writing to PORTA will now set bits for input or output. 0 sets bit for input; 1 sets %}bit for output. 1 = PORTA operational 1 1 = peripheral A interrupt enabled. PBCTL %} 7 Peripheral B interrupt status. Set by peripheral interrupt; reset by reading PORTB. 3 Serial conn%}ector command line. 2 0 = PORTB is now port B direction control. Writing to PORTB will now set bits for in%}put or output. 0 sets bit for input; 1 sets bit for output. 1 = PORTB operational 1 %}1 = peripheral B interrupt enabled.The electronic configuration of the controller ports is as follows. ----------- -%}---------- \0 1 2 3 R/ \4 5 6 7 R/ \t + - L/ \t + - L/ ------- ------- 110 through 7 %}are the binary data bits for port A or port B.+ and - are +5 volts and ground respectively.R and L are the left and right%} game paddles.t is the joystick trigger line. 10The data bits in the joystick ports are used as follows for the joysticks%} and game paddles.The joysticks and the port registers 11 7 6 5 4 3 2 1 0 -----------------PORTA %} |U|D|L|R|U|D|L|R| ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 8paddle | | %} | |triggers 3 2 1 0PORTB -----------------(400/800 |U|D|L|R|U|D|L|R|only) -----------------paddle %} | | | |triggers 7 6 5 4 U = up D = down L = left R = right 10The joysticks may be r%}ead either directly from the port registers or from the joystick shadow registers. During vertical blank, the data in the po%}rt registers is separated and put into the shadow registers. These registers are, STICK0 [$0278 (632)], STICK1 [$0279 (633)]%}, STICK2 [$027A (634)] and STICK3 [$027B (635)]. The triggers may be read from the joystick trigger registers, TRIG0 - TRIG3%} [$D010 - $D013 (53264 - 53267)]. These register have shadow registers, STRIG0 - STRIG3 [$0284 - 0287 (644 -647)]. If these%} registers read zero the associated triggers are pressed. The paddle triggers may be read from their shadow registers also. %}They are, PTRIG0 - PTRIG 7, [$027C - $0283 (236 - 643)].THE GAME PADDLE REGISTERSAlthough the game paddles are plugged in%}to the joystick ports, they are not read from the port registers. The game paddles are read by first writing any number to t%}he start-pot-scan register, POTGO [$D20B (53771)]]. This turns off the capacitor dump transistors and allows the pot reading%}capacitors to begin charging. It also sets the TV scan line counter to zero. As each capacitor crosses a certain trigger%} voltage, the number of TV lines scanned is put in the respective pot value register. When the scan counter reaches 228, the%} capacitor dump transistors are turned on and the number 228 is put into any pot value registers which are still empty.Befo%}re reading the pot value registers, ALLPOT [$D208 (53768)] should be checked. In this register, each bit corresponds to the %}validity of a pot value register. If a bit is zero, its' associated pot value register is valid. If bit 2 of SKCTL, [$D20F %}(53775)], is 1, the pots go into the fast scan mode. In this mode the paddles are read in only 2 TV scan lines. They can al&}so be read without regard to POTGO or ALLPOT.The pot value registers contain the number of TV scan lines it last took for t&}he paddle reading capacitors to charge (up to 228). These registers are POT0 - POT7 [$D200 - $D207 (53760 -53767)]. Their s&}hadow registers are PADDL0 - PADDL7 [$0270 - $0277 (624 - 631)].THE LIGHT PEN REGISTERSWhenever a joystick trigger is pre&}ssed, the light pen registers, PENH and PENV are updated. PENH [$D40C (54284)] takes a value based on a color clock counter.&} The value can be from 0 to 227. PENV [$D40D [54285)] takes the 8 highest bits of the vertical line counter. A light pen i&}s simply a photo transistor connected to a joystick trigger line and focused on the TV screen. When the electron beam strike&}s the part of the screen the light pen is focused on, the transistor turns on pulling the trigger line low. The light pen re&}gisters then contain numbers relative to where the light pen was pointing. The shadow register for PENH and PENV are LPENH [&}$0234 (564)] and LPENV [$0235 (566)). 5Useful operating system equatesTRIG0 $D010 (53264): joystick trigger& }s |TRIG3 $D013 (53268):POT0 $D200 (53760): paddle value |POT7 $D207 (53767):ALLPOT & }$D208 (53768): reads validity of pot valuesPOTGO $D20B (53771): starts paddle readSKCTL $D20F & }(53775): bit 2 enables fast pot scanPORTA $D300 (53016): port A dataPORTB $D301 (53017): port B dataPA& }CTL $D302 (54018): port A controlPBCTL $D303 (54019): port B controlPENH $D40C (54284): ligh& }t pen horizontal value PENV $D40D (54285): light pen vertical valueShadow registersLPENH $0234 &} (564): light pen horizontal valueLPENV $0235 (566): light pen vertical valuePADDL0 $0270 (624): gam&}e paddle values |PADDL7 $0277 (631)STICK0 $0278 (632): joystick registers |STICK0 $027B &} (635):PRTIG0 $027C (636): paddle triggers |PTRIG7 $0283 (643):STRIG0 $0284 &}(644): joystick triggers |STRIG3 $0287 (647): |PTRIG7 $0283 (643):STRIG0 $0284 $?12 4 1 5 0 10 70 2 12 13227E27H19-@CHAPTER 19MISC HARDWARE REGISTERS AND INFORMATIONVERTICAL LINE CO*}UNTERThe ANTIC chip has a vertical line counter at $0D4B (54283). This counter shows the high 8 bits of a 9 bit counter. *}This gives two line resolution. The value of this counter is placed into PENV [$D40D (54285)] when a joystick trigger is pre*}ssed.SERIAL PORT REGISTERSThe POKEY chip has some registers which control the serial port.The serial port control regis*}ter, SKCTL [$D20F (53775)], controls the serial port configuration and the game paddle scan mode. and some keyboard circuitr*}y.The serial port control register 7 6 5 4 3 2 1 0 ----------------- SKCTL | | | | | | | | |*} ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 8 bits 0 1 = enable keyb*}oard debounce 1 1 = enable keyboard scan both 0 = set initialization mode. 2 1 = fast pot scan 3 *} 1 = serial output is two tone (for cassette) instead of logical true/false 4\ 5 >- serial port mode con*}trol 6/ 7 1 = forced logical 0 on outputIf the serial port control register is read from it gives the serial *}port status. The register is then called SKSTATSerial port status register 7 6 5 4 3 2 1 0 -----------------*} | | | | | | | |1| ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 8 bits 0 not used, reads *}1 1 0 = serial input shift register busy 2 0 = last key is still pressed 3 0 = shift key pressed *} 4 0 = direct from serial input port 5 0 = keyboard over-run 6 0 = serial data input over-run 7 1 * }= serial data input frame errorThe serial port status is latched and must be reset by writing any number to its' reset regi*!}ster, SKRES [$D20A (53770)].SERIAL PORT INPUT AND OUTPUT DATAWhen a full byte of serial input data has been received, it *"}is read from the serial input data register, SERIN [$D20D (53773). Serial output data is written to the same register, which*#} is then called the serial output data register, SEROUT. This register is usually written to in response to a serial output *$}data interrupt (bit 4 of IRQST).HARDWARE CHIP MEMORY ALLOCATIONThe addresses for the hardware chips are not completely de*%}coded. For example, the PIA needs only four bytes of memory but is active from $D300 - D3FF. Enough room for 64 PIA chips. *&} A second pair of parallel ports could be added by accessing the address bus and further decoding the address for a second PI*'}A. (This would also require a small modification of the computer's circuit board to disable the original PIA when the new on*(}e is active.) Similarly, there is room for 15 more POKEY or ANTIC chips and 7 gtia chips, should you ever need them. (GTIA *)}uses $D000 - D0FF, POKEY uses $D200 - $D2FF and ANTIC uses $D400 - $D4FF.)Useful data base variables and OS equates 5**}75SKRES $D20A (53770): serial port status resetSEROUT $D20D (53773): serial output dataSERIN $D20D (53773): *+}serial input dataSKCTL $D20F (53775): serial port controlSKSTAT $D20F (53775): serial port statusVCOUNT $D40B *,} (54283): vertical line counterOs shadow registersSSKCTL $0232 (562): SKCTL serial port statusVCOUNT $D40B (Y12 4 1 5 0 10 70 2 12 13227E27H20-@27GCHAPTER 20THE XL AND XE MODELSBASIC B BUGSMost of the Atari..} 600XL and 800XL models were supplied with the "debugged" version B of Atari BASIC. This new BASIC got rid of the minor bugs./} of BASIC A and introduced some new major bugs of it's own. 11Each time a program is saved, 16 extra bytes are tagged onto .0}the end of the program. After many saves and reloads, as when developing a long program, the program becomes too large for t.1}he memory.The computer may lock up unpredictably.Program line links may get messed up, leaving garbage in the listing and.2} the program unrunable.Large LISTed programs may not run unless SAVed and reLOADed.If the length of a listed program is a.3} multiple of a certain number of bytes, it will not run unless the length is somehow changed. 10BASIC version B has been re.4}placed by version C. All of the XE models have this truly debugged version of BASIC.NEW OPERATING SYSTEM PROBLEMSI have .5}heard of only one bug in the operating system in XL and XE models. This is a mishandling of the printer timeout. The comput.6}er cannot tell if there is a printer attached or not. This may have been fixed in the XE models. However, many programs, so.7}me even formerly sold by Atari, do not jump through published jump vectors when using the operating system. These programs w.8}ill not run on XL/XE models. (Some of these programs are Atari Word Processor (not Atariwriter) and LJKs Letter Perfect and .9}Data Perfect.) Since the operating system ROM can be switched to RAM, a "translator" can be used to load the 800 operating s.:}ystem into an XL or XE model.130XE MEMORY MANAGEMENTThe 130XE has an extra 64K bank of memory. It is divided into four .;}blocks of 16K each. Each block can be switched to replace part of the main bank of RAM from $4000 (16384) to $7FFF (32767). .<} Furthermore, it can be switched in such a way that only the 6502, or the ANTIC chip can see the extra memory.27HPort B (f.=}ormerly the two extra joystick ports of the 400/800) is used to manage the memory.Port B and memory management 11 .>} 7 6 5 4 3 2 1 0 -----------------PORTB |T|U|A|C|S S|B|R| ----------------- 1 6 3 1 8.?} 4 2 1 2 4 2 6 8 R 1 = OS replaced by RAM B 0 = BASIC enabled S S bank select bit.@}s C 0 = CPU sees switched RAM at $4000 A 0 = ANTIC sees switched RAM U unused T 0 = self test 1.A}0Bits 2 and 3 of PORTB select which block of the extra bank of memory is switched in.Bank select bits bits blo.B}ck 2 3 address ------------------------- 0 0 $0000 - $3FFF 0 1 $4000 - $7FFF 1 0 .C} $8000 - $BFFF 1 1 $C000 - $FFFFBits 4 and 5 select which chip sees the switched in RAM at $4000 - $7FFF.D}Chip select bits bits ANTIC 6502 4 5 -------------------------- 0 0 Ext. Ext. 0.E} 1 Ext. Main 1 0 Main Ext. 1 1 Main MainTHE XL PARALLEL PORT Pin out o.F}f the parallel port top from rear 111112222233333444445 2468024680246802468024680 .G} ------------------------- ------------------------- 11111222223333344444 1357913579.H}135791357913579 1 2 GND 3 A1 4 A0 5 A3 6 A2 7 A5 8.I} A4 9 GND 10 A6 11 A8 12 A7 13 A10 14 A9 15 A12 16 A11 1.J}7 A14 18 A13 19 A15 20 GND 21 D1 22 D0 23 D3 24 D2 25 D5 .K} 26 D4 27 D7 28 D6 29 GND 30 GND 31 GND 32 phase 2 clock 33 RESET .L} 34 35 RDY 36 IRQ 37 37 39 40 41 GND 42 43 RAS 44.M} 45 R/W 46 GND 47 +5V 48 +5V 49 GND 50 11The phase 2 clock runs at 1.8 MHz. Wh.N}en the clock is high, the address and R/W lines are valid. The clock goes from high to low, when the data lines are also val.O}id. All lines then become invalid. 10The 130XE doesn't have the parallel port. However, it has a cartridge slot expansion.P}. This is a small cartridge-slot-like connector with the necessary connector to use parallel expansion.FINE SCROLLINGIf .Q}address $026E (622) is $FF, graphics 0 will be in the fine scroll mode.OTHER ADDRESSESDSCTLN [$0D25,2 (725)] is the disk .R}sector size. should be $80 (128).DMASAV [$02DD (735)] is a copy of the DMA control register, SDMCTL [$022F (559)]. It is .S}set up when a channel is opened to the screen. The value is moved to SDMCTL whenever a key is pressed. It is used to restor.T}e the display if DMA is disabled.PUPBT [$033D,3 (829-831)] is used to test memory integrity when [RESET] is pressed. If th.U}ese bytes are not $5C, $93 and $25, the computer will do a cold start when [RESET] is pressed.The self-test ROM is from $D0.V}00 to $D7FF, the same addresses as the hardware registers. This part of the operating system ROM is disabled when not used. .W} When The computer is put into the self-test mode, This part of ROM is copied to $5000 to $57FF and run from there.GINTLK [.X}$03FA (1018)] is a logical 1 if a cartridge is installed (built-in BASIC is considered a cartridge). BASIC can be disabled b.Y}y poking 1018 with a non-zero number. If [RESET] is then pressed, the computer will attempt to load the DUP.SYS file and bas.Z}ic will be completely disabled.ber. If [RESET] is then pressed, the computer will attempt to load the DUP.SYS file and bas,!A voluntary payment of $2.50 isrequested for this disk. I will giveany technical support I can to thosewho have paid thi2\}s fee and include aS.A.S.E. with their questions. Write to the address on the title page of this manual.This disk contain2]}s the second half ofa reference manual for Atari 8 bitcomputers. The manual is written forthe Atari 800 but updates for X2^}L/XEmodels are included.The files were written withATARIWRITER and for an Epson MX80.You should be able to load them int2_}oanother word processor and changethem to work with it and a differentprinter.If you have ATARIWRITER and an Epsoncompa2`}tible printer, load and printeach CHAP file (CHAP11 - CHAP20).Ignore the files with extensions(i.e. CHAP15.1) as they will2a} auto-matically chain to the CHAP files.Change the following codes for adifferent word processor or printer.[CONTROL][O2b}]27E starts NLQ mode " [O]27F stops NLQ mode " [O]27G starts BOLD mode " [O]27H stops BOLD mode " 2c} [V]D:... chains new file " [E] page eject " [L] left margin " [R] right margin " [2d}T] top margin (half " [B] bottom margin lines) " [Y] page length " " [C] center 2e}" [C][C] right justify-------------------------------------Do you program in BASIC? Add over 40powerful new commands2f} to Atari andcompatible BASICs with the AtariBASIC Power Pack; a function libraryfor Atari BASIC. Just some of it'sfeatu2g}res are: High speed disk access directly to strings. High speed graphics saving and loading. Cust2h}om character set loading. Mixed text and graphics in mode 8. English error messages. Decimal aligned n2i}umber columns. Five color, 40 column text mode.It is written in standard Atari BASICwith some machine language inst2j}rings. It's easy to use toobecause all commands are called byname, not by address or line number.For this and part one of2k} the Atari 8bit reference manual write to:C & T ComputerActiveP.O. Box 893Clinton, OK 73601r.For this and part one of0b