CHAPTER 19

Misc Hardware registers and information


VERTICAL LINE COUNTER

The ANTIC chip has a vertical line counter at $0D4B (54283). This counter shows the high 8 bits of a 9 bit counter. This gives two line resolution. The value of this counter is placed into PENV [$D40D (54285)] when a joystick trigger is pressed.


SERIAL PORT REGISTERS

The POKEY chip has some registers which control the serial port.

The serial port control register, SKCTL [$D20F (53775)], controls the serial port configuration and the game paddle scan mode. and some keyboard circuitry.

                The serial port control register

7 6 5 4 3 2 1 0 ----------------- SKCTL | | | | | | | | | ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 8

bits

0 1 = enable keyboard debounce 1 1 = enable keyboard scan both 0 = set initialization mode. 2 1 = fast pot scan 3 1 = serial output is two tone (for cassette) instead of logical true/false 4\ 5 >- serial port mode control 6/ 7 1 = forced logical 0 on output

If the serial port control register is read from it gives the serial port status. The register is then called SKSTAT

          Serial port status register

7 6 5 4 3 2 1 0 ----------------- | | | | | | | |1| ----------------- 1 6 3 1 8 4 2 1 2 4 2 6 8

bits

0 not used, reads 1 1 0 = serial input shift register busy 2 0 = last key is still pressed 3 0 = shift key pressed 4 0 = direct from serial input port 5 0 = keyboard over-run 6 0 = serial data input over-run 7 1 = serial data input frame error

The serial port status is latched and must be reset by writing any number to its' reset register, SKRES [$D20A (53770)].


SERIAL PORT INPUT AND OUTPUT DATA

When a full byte of serial input data has been received, it is read from the serial input data register, SERIN [$D20D (53773). Serial output data is written to the same register, which is then called the serial output data register, SEROUT. This register is usually written to in response to a serial output data interrupt (bit 4 of IRQST).


HARDWARE CHIP MEMORY ALLOCATION

The addresses for the hardware chips are not completely decoded. For example, the PIA needs only four bytes of memory but is active from $D300 - D3FF. Enough room for 64 PIA chips. A second pair of parallel ports could be added by accessing the address bus and further decoding the address for a second PIA. (This would also require a small modification of the computer's circuit board to disable the original PIA when the new one is active.) Similarly, there is room for 15 more POKEY or ANTIC chips and 7 gtia chips, should you ever need them. (GTIA uses $D000 - D0FF, POKEY uses $D200 - $D2FF and ANTIC uses $D400 - $D4FF.)

     Useful data base variables and OS equates

SKRES $D20A (53770): serial port status reset SEROUT $D20D (53773): serial output data SERIN $D20D (53773): serial input data SKCTL $D20F (53775): serial port control SKSTAT $D20F (53775): serial port status VCOUNT $D40B (54283): vertical line counter

Os shadow registers

SSKCTL $0232 (562): SKCTL


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