538,539



     timer is decremented every stage one VBLANK. When it reaches
     zero, it sets a flag to jump (JSR) through the address stored in
     locations 550, 551 ($226, $227). Only the realtime clock
     (locations 18-20; $12-14), timer one, and the attract mode
     register (77; $4D) are updated when the VBLANK routine is cut
     short because time-critical code (location 66; $42 set to non-zero
     for critical code) is executed by the OS. Since the OS uses timer
     one for its I/O routines and for timing serial bus operations
     (setting it to different values for timeout routines), you should use
     another timer to avoid conflicts or interference with the operation
     of the system.

538,539        21A,21B        CDTMV2
     System timer two. Decremented at the stage two VBLANK. Can
     be decremented every stage one VBLANK, subject to critical
     section test as defined by setting of CRITIC flag (location 66;
     $42). This timer may miss (skip) a count when time-critical code
     (CRITIC equals non-zero) is being executed. It performs a JSR
     through location 552, 553 ($228, $229) when the value counts
     down to zero.

540,541        21C,21D        CDTMV3
     System timer three. Same as 538. Timers three, four, and five are
     stopped when the OS sets the CRITIC flag to non-zero as well.
     The OS uses timer three to OPEN the cassette recorder and to set
     the length of time to read and write tape headers. Any prior value
     in the register during this function will be lost.

542,543        21E,21F        CDTMV4
     System timer four. Same as 538 ($21A).

544,545        220,221        CDTMV5
     System timer five. Same as 538 ($21A). Timers three, four, and
     five all set flags at 554, 556 and 558 ($22A, $22C, $22E),
     respectively, when they decrement to zero.

546,547        222,223        VVBLKI
     VBLANK immediate register. Normally jumps to the stage one
     VBLANK vector NMI interrupt processor at location 59345
     ($E7D1); in the new OS "B" ROMs; 59310, $E7AE). The NMI
     status register tests to see if the interrupt was due to a VBI (after
     testing for a DLI) and, if so, vectors through here to the VBI
     routine, which may be user-written. On powerup, VBI's are
     enabled and DLI's are disabled. See location 512; $200.

548,549        224,225        VVBLKD
     VBLANK deferred register; system return from interrupt,
     initialized to 59710 ($E93E, in the new OS "B" ROMs; 59653;