53770



     POKE any non-zero value here to load and start the timers; the
     value isn't itself used in the calculations. This resets all of the audio
     frequency dividers to their AUDF values. If enabled by IRQEN
     below, these AUDF registers generate timer interrupts when they
     count down from the number you POKEd there to zero. The
     vectors for the AUDF1, AUDF2 and AUDF4 timer interrupts are
     located between 528 and 533 ($210 and $215). POKEY timer four
     interrupt is only enabled in the new "B" OS ROMs.

                              KBCODE
     (R) Holds the keyboard code which is then loaded into the shadow
     register (764; $2FC) when a key is hit. Usually read in response to
     the keyboard interrupt. Compares the value with that in CH1 at
     754 ($2F2). If both values are the same, then the new code is
     accepted only if a suitable key debounce delay time has passed.
     The routines which test to see if the key code will be accepted start
     at 65470 ($FFBE). BIT 7 is the control key flag, BIT 6 is the shift key
     flag.

53770          D20A           SKREST
     (W) Reset BITs 5 - 7 of the serial port status register at 53775 to one.

                              RANDOM
     (R) When this location is read, it acts as a random number
     generator. It reads the high order eight bits of the 17 bit
     polynomial counter (nine bit if BIT 7 of AUDCTL is set) for the
     value of the number. You can use this location in a program to
     generate a random integer between zero and 255 by:

     10  PRINT PEEK(53770)

     This is a more elegant solution than INT(RND(0) * 256). For a test of
     the values in this register, use this simple program:

     10 FOR N = 1 TO 20: PRINT PEEK(53770): NEXT N

53771          D20B           POTGO
     (W) Start the POT scan sequence. You must read your POT values
     first and then start the scan sequence, since POTGO resets the
     POT registers to zero. Written by the stage two VBLANK
     sequence.

53772          D20C           ....
     Unused.

53773          D20D           SEROUT
     (W) Serial port data output. Usually written to in the event of a
     serial data out interrupt. Writes to the eight bit (one byte) parallel
     holding register that is transferred to the serial shift register when a
     full byte of data has been transmitted. This "holding" register is
     used to contain the bits to be transmitted one at a time (serially) as