APPENDIX SIXTEEN __________________________________________________________



Memory Management On The 130XE
The bank select location is 54017 ($D301). PORTB, now an output
rather than the input byte it was on the 400/800 machines, uses bits
2-5 (corresponding to pins 2-5 on the PIA 6520 chip) to select which
16K bank is being accessed and whether or not the area is used for
video (ANTIC) access or 6502 access. There is another 64K of RAM in
the 130XE (not the 65XE) which is identical to the main bank in layout
and control, but it can be accessed only in 16K banks at any one
time. Of course, using a fast interrupt driven ML routine, you can
change bits in PORTB to shunt between 16K banks as necessary.

When a bank is enabled for access, it appears through an "access
window" in the main memory, at locations 16384-32767 ($4000-$7FFF,
below the OS ROM or cartridge areas). If you enable bank switching,
you cause the normal RAM in this area to be replaced by the bank
you've chosen. Bit 4 is the CPU Bank Enable bit--CBE--and bit 5 is
the Video Bank Enable bit--VBE. Bits 3 and 2 are the MSB and LSB of
the secondary bank address, respectively.

You can configure the system to one of four modes: compatible with
existing XL/XE software, CPU extended RAM, video extended RAM,
and general extended RAM modes. In all cases, only the area in the
access window is affected by the mode selection.

No synchronization between areas is required by the programmer;
the system will know where the display area is by the bit settings in
PORTB. This is important: Once you set the bits, you don't have to
worry about where the access will occur; the OS takes over and se-
lects the right bank. If you intend to make use of more than one 16K
block in the extended RAM, you'll have to set and reset the bank
selection bits as necessary, but not the CPE or VBE bits.

In CPU extended RAM mode, only the CPU accesses the extra mem-
ory. All ANTIC cycles operate in the main 64K memory. This means
you can use the extended memory for programs and data, while
using the main bank for display lists and screen data.

In the video extended RAM mode, all ANTIC references to the area
$4000-$7FFF will be directed to the secondary bank; all CPU ref-
erences will occur in the main bank. This allows programmers to ac-
cess the entire RAM memory for programs and data in the main
area, while locating display lists and screen data in the secondary
bank.

In the extended RAM mode, both the CPU and ANTIC process in the
second bank, exactly as if it were the main bank in compatibility
mode (which is then not accessed at all). The normal state of the bits
for either CPE or VBE is 1; secondary bank disabled. When set to 0,