1,"R0","R1"
2,"R0","R1","R2","R3","R4","R5","R6","R7"
*;NUM START LENGTH EXP     LOW      HIGH   COMMENT
   1,   7,     1,   @1,     0,       1       ; register indirect
   2,   5,     3,   @2,     0,       7       ; register
   3,   8,     8,   #,      0,       255     ; direct byte/bit
   4,   8,     8,   #,    -128,      255     ; immediate
   5,   16,    8,   #,    -128,      255     ; immediate
   7,   8,     16,  #,      0,       65535   ; long branch
   8,   8,     8,   #-$-`,  $+`-128, $+`+127 ; relative branch
   9,   16,    8,   #-$-`,  $+`-128, $+`+127 ; relative branch
  10,   8,     16,  #,      -32768,  65535   ; immediate
  11,   16,    8,   #,      0,       255     ; direct byte
  12,   0,     16, {# & 700H}*32 | {# & 255},$+2 & 0F800H,$+2 | 7FFH
  13,  13,     3,   #,      0,       7       ; bit
  14,   8,     8,   #<<3,  32,       47      ; bit addressable area
  15,   8,     8,   #&$F8, 80,       $F8     ; bit addressable register
*
 1, @{1}^06:                 ; register indirect
 2, {2}^08:                  ; register
 3, {3}^0500:                ; direct byte
 4, #{4}^0400:               ; immediate
 5, {3},A^0200:              ; direct byte from A
 6, {3},#{5}^030000:         ; direct immediate
 7, {3}^0000:                ; direct byte/bit
 9, {7}^000000:              ; long branch
10, {8}^0000:                ; relative branch
11, @{1},#{4},{9}^000000:
12, #{4},{9}^000000:
13, {3},{9}^000000:
14, {2},#{4},{9}^000000:
15, {3},{9}^000000:          ; bit, relative
16, {2},{8}^0000:            ; register, relative
17, @{1},#{4}^7600:
18, @{1},A^F6:
19, @{1},{3}^A600:
20, DPTR,#{10}^900000:
21, {2},#{4}^7800:
22, {2},A^F8:
23, {2},{3}^A800:
24, {3},#{5}^750000:
25, {3},A^F500:
26, {3},@{1}^8600:
27, {3},C^9200:
28, {3},{2}^8800:
29, {11},{3}^850000:
30, A,@{1}^E2:
31, @{1},A^F2:
32, {12}^0000:
33, {14}.{13}^0000:		;bit addr area
34, {15}.{13}^0000:		;bit addr reg
35, {14}.{13},{9}^000000:	;bit addr area, rel
36, {15}.{13},{9}^000000:	;bit addr reg, rel
37, {14}.{13},C^9200:		;bit addr area, C
38, {15}.{13},C^9200:		;bit addr reg, C
*
ACALL |32^1100:

ADD A,|1-4^20:

ADDC A,|1-4^30:

AJMP |32^0100:

ANL C,/|7|33|34^B000:
ANL C,|7|33|34^8200:
ANL A,|1-4^50:
ANL |5-6^50:

CALL |32^1100:

CJNE A,|12^B4:
CJNE A,|13^B5:
CJNE |11^B6:
CJNE |14^B8:

CLR A^E4:
CLR C^C3:
CLR |7|33|34^C200:

CPL A^F4:
CPL C^B3:
CPL |7|33|34^B200:

DAA^D4:
DA A^D4:

DEC A^14:
DEC |1-3^10:

DIV AB^84:

DJNZ |16^D8:
DJNZ |13^D5:

INC A^04:
INC DPTR^A3:
INC |1-3^00:

JMP |32^0100:

JMP @A+DPTR^73:

JBC |15|35|36^100000:
JB  |15|35|36^200000:
JNB |15|35|36^300000:

JC  |10^4000:
JNC |10^5000:
JZ  |10^6000:
JNZ |10^7000:

LCALL |9^120000:
LJMP  |9^020000:

MOV A,|4^70:
MOV A,|1-3^E0:
MOV C,|7|33|34^A200:
MOV |17-29|37|38^00:

MOVC A,@A+DPTR^93:
MOVC A,@A+PC^83:

MOVX @DPTR,A^F0:
MOVX A,@DPTR^E0:
MOVX |30-31^00:

MUL AB^A4:

NOP^00:

ORL C,/|7|33|34^A000:
ORL C,|7|33|34^7200:
ORL A,|1-4^40:
ORL |5-6^40:

POP |7^D000:
PUSH |7^C000:

RETI^32:
RET^22:

RL A^23:
RLC A^33:

RR A^03:
RRC A^13:

SETB C^D3:
SETB |7|33|34^D200:

SJMP |10^8000:

SUBB A,|1-4^90:

SWAP A^C4:

XCH A,|1-3^C0:

XCHD A,|1^D6:

XRL A,|1-4^60:
XRL |5-6^60:
